LM231, LM331

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LM231A/LM231/LM331A/LM331 Precision Voltage-to-Frequency Converters

Check for Samples: LM231, LM331

1FEATURES DESCRIPTION
•
23 Ensured Linearity 0.01% max The LM231/LM331 family of voltage-to-frequency
converters are ideally suited for use in simple low-
• Improved Performance in Existing Voltage-to- cost circuits for analog-to-digital conversion, precision
Frequency Conversion Applications frequency-to-voltage conversion, long-term
• Split or Single Supply Operation integration, linear frequency modulation or
• Operates on Single 5V Supply demodulation, and many other functions. The output
when used as a voltage-to-frequency converter is a
• Pulse Output Compatible with All Logic Forms pulse train at a frequency precisely proportional to the
• Excellent Temperature Stability: ±50 ppm/°C applied input voltage. Thus, it provides all the
max inherent advantages of the voltage-to-frequency
• Low Power Consumption: 15 mW Typical at 5V conversion techniques, and is easy to apply in all
standard voltage-to-frequency converter applications.
• Wide Dynamic Range, 100 dB min at 10 kHz Further, the LM231A/LM331A attain a new high level
Full Scale Frequency of accuracy versus temperature which could only be
• Wide Range of Full Scale Frequency: 1 Hz to attained with expensive voltage-to-frequency
100 kHz modules. Additionally the LM231/331 are ideally
• Low Cost suited for use in digital systems at low power supply
voltages and can provide low-cost analog-to-digital
conversion in microprocessor-controlled systems.
And, the frequency from a battery powered voltage-
to-frequency converter can be easily channeled
through a simple photo isolator to provide isolation
against high common mode levels.
The LM231/LM331 utilize a new temperature-
compensated band-gap reference circuit, to provide
excellent accuracy over the full operating temperature
range, at power supplies as low as 4.0V. The
precision timer circuit has low bias currents without
degrading the quick response necessary for 100 kHz
voltage-to-frequency conversion. And the output are
capable of driving 3 TTL loads, or a high voltage
output up to 40V, yet is short-circuit-proof against
VCC.

CONNECTION DIAGRAM

Figure 1. Plastic Dual-In-Line Package (PDIP)

See Package Number P (R-PDIP-T8)
1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 Teflon is a registered trademark of E.
3 All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM231, LM331
SNOSBI2B – JUNE 1999 – REVISED MARCH 2013 [Link]

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings (1) (2) (3)

Supply Voltage, VS 40V
Output Short Circuit to Ground Continuous
Output Short Circuit to VCC Continuous
Input Voltage −0.2V to +VS
(4)
Package Dissipation at 25°C 1.25W
Lead Temperature (Soldering, 10 sec.)
PDIP 260°C
(5)
ESD Susceptibility 500V

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its specified operating conditions.
(2) All voltages are measured with respect to GND = 0V, unless otherwise noted.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(4) The absolute maximum junction temperature (TJmax) for this device is 150°C. The maximum allowable power dissipation is dictated by
TJmax, the junction-to-ambient thermal resistance (θJA), and the ambient temperature TA, and can be calculated using the formula
PDmax = (TJmax - TA) / θJA. The values for maximum power dissipation will be reached only when the device is operated in a severe
fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed).
Obviously, such conditions should always be avoided.
(5) Human body model, 100 pF discharged through a 1.5 kΩ resistor.

(1)
Operating Ratings
Operating Ambient Temperature
LM231, LM231A −25°C to +85°C
LM331, LM331A 0°C to +70°C
Supply Voltage, VS +4V to +40V

(1) All voltages are measured with respect to GND = 0V, unless otherwise noted.

Package Thermal Resistance

Package θJ-A
8-Lead PDIP 100°C/W

Electrical Characteristics
All specifications apply in the circuit of Figure 16, with 4.0V ≤ VS ≤ 40V, TA=25°C, unless otherwise specified.
Parameter Conditions Min Typ Max Units

(1)
4.5V ≤ VS ≤ 20V ±0.003 ±0.01 % Full- Scale
VFC Non-Linearity
TMIN ≤ TA ≤ TMAX ±0.006 ±0.02 % Full- Scale
VFC Non-Linearity in Circuit of Figure 15 VS = 15V, f = 10 Hz to 11 kHz ±0.024 ±0.14 %Full- Scale
Conversion Accuracy Scale Factor (Gain)
LM231, LM231A VIN = −10V, RS = 14 kΩ 0.95 1.00 1.05 kHz/V
LM331, LM331A 0.90 1.00 1.10 kHz/V
Temperature Stability of Gain
LM231/LM331 TMIN ≤ TA ≤ TMAX, 4.5V ≤ VS ≤ 20V ±30 ±150 ppm/°C
LM231A/LM331A ±20 ±50 ppm/°C
4.5V ≤ VS ≤ 10V 0.01 0.1 %/V
Change of Gain with VS
10V ≤ VS ≤ 40V 0.006 0.06 %/V
Rated Full-Scale Frequency VIN = −10V 10.0 kHz
Gain Stability vs. Time (1000 Hours) TMIN ≤ TA ≤ TMAX ±0.02 % Full- Scale

(1) Nonlinearity is defined as the deviation of fOUT from VIN × (10 kHz/−10 VDC) when the circuit has been trimmed for zero error at 10 Hz
and at 10 kHz, over the frequency range 1 Hz to 11 kHz. For the timing capacitor, CT, use NPO ceramic, Teflon®, or polystyrene.
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Electrical Characteristics (continued)

All specifications apply in the circuit of Figure 16, with 4.0V ≤ VS ≤ 40V, TA=25°C, unless otherwise specified.
Parameter Conditions Min Typ Max Units
Over Range (Beyond Full-Scale) Frequency VIN = −11V 10 %
INPUT COMPARATOR
Offset Voltage ±3 ±10 mV
LM231/LM331 TMIN ≤ TA ≤ TMAX ±4 ±14 mV
LM231A/LM331A TMIN ≤ TA ≤ TMAX ±3 ±10 mV
Bias Current −80 −300 nA
Offset Current ±8 ±100 nA
VCC−2.
Common-Mode Range TMIN ≤ TA ≤ TMAX −0.2 V
0
TIMER
Timer Threshold Voltage, Pin 5 0.63 0.667 0.70 × VS
Input Bias Current, Pin 5 VS = 15V
All Devices 0V ≤ VPIN 5 ≤ 9.9V ±10 ±100 nA
LM231/LM331 VPIN 5 = 10V 200 1000 nA
LM231A/LM331A VPIN 5 = 10V 200 500 nA
VSAT PIN 5 (Reset) I = 5 mA 0.22 0.5 V
CURRENT SOURCE (Pin 1)
Output Current
LM231, LM231A RS = 14 kΩ, VPIN 1 = 0 126 135 144 μA
LM331, LM331A 116 136 156 μA
Change with Voltage 0V ≤ VPIN 1 ≤ 10V 0.2 1.0 μA
Current Source OFF Leakage
LM231, LM231A, LM331, LM331A 0.02 10.0 nA
All Devices TA = TMAX 2.0 50.0 nA
Operating Range of Current (Typical) (10 to 500) μA
REFERENCE VOLTAGE (Pin 2)
LM231, LM231A 1.76 1.89 2.02 VDC
LM331, LM331A 1.70 1.89 2.08 VDC
Stability vs. Temperature ±60 ppm/°C
Stability vs. Time, 1000 Hours ±0.1 %
LOGIC OUTPUT (Pin 3)
I = 5 mA 0.15 0.50 V
VSAT I = 3.2 mA (2 TTL Loads), TMIN ≤ TA ≤
0.10 0.40 V
TMAX
OFF Leakage ±0.05 1.0 μA
SUPPLY CURRENT
VS = 5V 2.0 3.0 4.0 mA
LM231, LM231A
VS = 40V 2.5 4.0 6.0 mA
VS = 5V 1.5 3.0 6.0 mA
LM331, LM331A
VS = 40V 2.0 4.0 8.0 mA

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FUNCTIONAL BLOCK DIAGRAM

Pin numbers apply to 8-pin packages only.

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TYPICAL PERFORMANCE CHARACTERISTICS

(All electrical characteristics apply for the circuit of Figure 16, unless otherwise noted.)
Nonlinearity Error
as Precision V-to-F
Converter (Figure 16) Nonlinearity Error

Figure 2. Figure 3.

Nonlinearity Error
vs. Frequency
Power vs.
Supply Voltage Temperature

Figure 4. Figure 5.

VREF Output Frequency

vs. vs.
Temperature VSUPPLY

Figure 6. Figure 7.

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

(All electrical characteristics apply for the circuit of Figure 16, unless otherwise noted.)
100 kHz Nonlinearity Error Nonlinearity Error
(Figure 17) (Figure 15)

Figure 8. Figure 9.

Power Drain
Input Current (Pins 6,7) vs. vs.
Temperature VSUPPLY

Figure 10. Figure 11.

Output Saturation Voltage vs. Nonlinearity Error, Precision

IOUT (Pin 3) F-to-V Converter (Figure 19)

Figure 12. Figure 13.

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APPLICATIONS INFORMATION

PRINCIPLES OF OPERATION
The LM231/331 are monolithic circuits designed for accuracy and versatile operation when applied as voltage-to-
frequency (V-to-F) converters or as frequency-to-voltage (F-to-V) converters. A simplified block diagram of the
LM231/331 is shown in Figure 14 and consists of a switched current source, input comparator, and 1-shot timer.

Figure 14. Simplified Block Diagram of Stand-Alone

Voltage-to-Frequency Converter and
External Components

Simplified Voltage-to-Frequency Converter

The operation of these blocks is best understood by going through the operating cycle of the basic V-to-F
converter, Figure 14, which consists of the simplified block diagram of the LM231/331 and the various resistors
and capacitors connected to it.
The voltage comparator compares a positive input voltage, V1, at pin 7 to the voltage, Vx, at pin 6. If V1 is
greater, the comparator will trigger the 1-shot timer. The output of the timer will turn ON both the frequency
output transistor and the switched current source for a period t=1.1 RtCt. During this period, the current i will flow
out of the switched current source and provide a fixed amount of charge, Q = i × t, into the capacitor, CL. This will
normally charge Vx up to a higher level than V1. At the end of the timing period, the current i will turn OFF, and
the timer will reset itself.
Now there is no current flowing from pin 1, and the capacitor CL will be gradually discharged by RL until Vx falls
to the level of V1. Then the comparator will trigger the timer and start another cycle.
The current flowing into CL is exactly IAVE = i × (1.1×RtCt) × f, and the current flowing out of CL is exactly Vx/RL ≃
VIN/RL. If VIN is doubled, the frequency will double to maintain this balance. Even a simple V-to-F converter can
provide a frequency precisely proportional to its input voltage over a wide range of frequencies.

Detail of Operation, Functional Block Diagram

The block diagram (FUNCTIONAL BLOCK DIAGRAM) shows a band gap reference which provides a stable 1.9
VDC output. This 1.9 VDC is well regulated over a VS range of 3.9V to 40V. It also has a flat, low temperature
coefficient, and typically changes less than ½% over a 100°C temperature change.
The current pump circuit forces the voltage at pin 2 to be at 1.9V, and causes a current i=1.90V/RS to flow. For
Rs=14k, i=135 μA. The precision current reflector provides a current equal to i to the current switch. The current
switch switches the current to pin 1 or to ground, depending upon the state of the RS flip-flop.
The timing function consists of an RS flip-flop and a timer comparator connected to the external RtCt network.
When the input comparator detects a voltage at pin 7 higher than pin 6, it sets the RS flip-flop which turns ON the
current switch and the output driver transistor. When the voltage at pin 5 rises to ⅔ VCC, the timer comparator
causes the RS flip-flop to reset. The reset transistor is then turned ON and the current switch is turned OFF.

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However, if the input comparator still detects pin 7 higher than pin 6 when pin 5 crosses ⅔ VCC, the flip-flop will
not be reset, and the current at pin 1 will continue to flow, trying to make the voltage at pin 6 higher than pin 7.
This condition will usually apply under start-up conditions or in the case of an overload voltage at signal input.
During this sort of overload the output frequency will be 0. As soon as the signal is restored to the working range,
the output frequency will be resumed.
The output driver transistor acts to saturate pin 3 with an ON resistance of about 50Ω. In case of over voltage,
the output current is actively limited to less than 50 mA.
The voltage at pin 2 is regulated at 1.90 VDC for all values of i between 10 μA to 500 μA. It can be used as a
voltage reference for other components, but care must be taken to ensure that current is not taken from it which
could reduce the accuracy of the converter.

Basic Voltage-to-Frequency Converter (Figure 15)

The simple stand-alone V-to-F converter shown in Figure 15 includes all the basic circuitry of Figure 14 plus a
few components for improved performance.
A resistor, RIN=100 kΩ ±10%, has been added in the path to pin 7, so that the bias current at pin 7 (−80 nA
typical) will cancel the effect of the bias current at pin 6 and help provide minimum frequency offset.
The resistance RS at pin 2 is made up of a 12 kΩ fixed resistor plus a 5 kΩ (cermet, preferably) gain adjust
rheostat. The function of this adjustment is to trim out the gain tolerance of the LM231/331, and the tolerance of
Rt, RL and Ct.
For best results, all the components should be stable low-temperature-coefficient components, such as metal-film
resistors. The capacitor should have low dielectric absorption; depending on the temperature characteristics
desired, NPO ceramic, polystyrene, Teflon or polypropylene are best suited.
A capacitor CIN is added from pin 7 to ground to act as a filter for VIN. A value of 0.01 μF to 0.1 μF will be
adequate in most cases; however, in cases where better filtering is required, a 1 μF capacitor can be used.
When the RC time constants are matched at pin 6 and pin 7, a voltage step at VIN will cause a step change in
fOUT. If CIN is much less than CL, a step at VIN may cause fOUT to stop momentarily.
A 47Ω resistor, in series with the 1 μF CL, provides hysteresis, which helps the input comparator provide the
excellent linearity.

*Use stable components with low temperature coefficients. See APPLICATIONS INFORMATION.
**0.1μF or 1μF, See PRINCIPLES OF OPERATION.

Figure 15. Simple Stand-Alone V-to-F Converter

with ±0.03% Typical Linearity (f = 10 Hz to 11 kHz)

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Details of Operation: Precision V-To-F Converter (Figure 16)

In this circuit, integration is performed by using a conventional operational amplifier and feedback capacitor, CF.
When the integrator's output crosses the nominal threshold level at pin 6 of the LM231/331, the timing cycle is
initiated.
The average current fed into the op-amp's summing point (pin 2) is i × (1.1 RtCt) × f which is perfectly balanced
with −VIN/RIN. In this circuit, the voltage offset of the LM231/331 input comparator does not affect the offset or
accuracy of the V-to-F converter as it does in the stand-alone V-to-F converter; nor does the LM231/331 bias
current or offset current. Instead, the offset voltage and offset current of the operational amplifier are the only
limits on how small the signal can be accurately converted. Since op-amps with voltage offset well below 1 mV
and offset currents well below 2 nA are available at low cost, this circuit is recommended for best accuracy for
small signals. This circuit also responds immediately to any change of input signal (which a stand-alone circuit
does not) so that the output frequency will be an accurate representation of VIN, as quickly as 2 output pulses'
spacing can be measured.
In the precision mode, excellent linearity is obtained because the current source (pin 1) is always at ground
potential and that voltage does not vary with VIN or fOUT. (In the stand-alone V-to-F converter, a major cause of
non-linearity is the output impedance at pin 1 which causes i to change as a function of VIN).
The circuit of Figure 17 operates in the same way as Figure 16, but with the necessary changes for high speed
operation.

*Use stable components with low temperature coefficients. See APPLICATIONS INFORMATION.
**This resistor can be 5 kΩ or 10 kΩ for VS=8V to 22V, but must be 10 kΩ for VS=4.5V to 8V.
***Use low offset voltage and low offset current op-amps for A1: recommended type LF411A

Figure 16. Standard Test Circuit and Applications Circuit, Precision Voltage-to-Frequency Converter

DETAILS OF OPERATION: F-to-V CONVERTERS

(Figure 18 and Figure 19)
In these applications, a pulse input at fIN is differentiated by a C-R network and the negative-going edge at pin 6
causes the input comparator to trigger the timer circuit. Just as with a V-to-F converter, the average current
flowing out of pin 1 is IAVERAGE = i × (1.1 RtCt) × f.

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In the simple circuit of Figure 18, this current is filtered in the network RL = 100 kΩ and 1 μF. The ripple will be
less than 10 mV peak, but the response will be slow, with a 0.1 second time constant, and settling of 0.7 second
to 0.1% accuracy.
In the precision circuit, an operational amplifier provides a buffered output and also acts as a 2-pole filter. The
ripple will be less than 5 mV peak for all frequencies above 1 kHz, and the response time will be much quicker
than in Figure 18. However, for input frequencies below 200 Hz, this circuit will have worse ripple than Figure 18.
The engineering of the filter time-constants to get adequate response and small enough ripple simply requires a
study of the compromises to be made. Inherently, V-to-F converter response can be fast, but F-to-V response
can not.

*Use stable components with low temperature coefficients.

See APPLICATIONS INFORMATION.
**This resistor can be 5 kΩ or 10 kΩ for VS=8V to 22V, but must be 10 kΩ for VS=4.5V to 8V.
***Use low offset voltage and low offset current op-amps for A1: recommended types LF411A or LF356.

Figure 17. Precision Voltage-to-Frequency Converter,

100 kHz Full-Scale, ±0.03% Non-Linearity

*Use stable components with low temperature coefficients.

Figure 18. Simple Frequency-to-Voltage Converter,

10 kHz Full-Scale, ±0.06% Non-Linearity

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*Use stable components with low temperature coefficients.

Figure 19. Precision Frequency-to-Voltage Converter,

10 kHz Full-Scale with 2-Pole Filter, ±0.01%
Non-Linearity Maximum

*L14F-1, L14G-1 or L14H-1, photo transistor (General Electric Co.) or similar

Figure 20. Light Intensity to Frequency Converter

Figure 21. Temperature to Frequency Converter

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Figure 22. Long-Term Digital Integrator Using VFC

Figure 23. Basic Analog-to-Digital Converter Using

Voltage-to-Frequency Converter

Figure 24. Analog-to-Digital Converter with Microprocessor

Figure 25. Remote Voltage-to-Frequency Converter with 2-Wire Transmitter and Receiver

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Figure 26. Voltage-to-Frequency Converter with Square-Wave Output Using ÷ 2 Flip-Flop

Figure 27. Voltage-to-Frequency Converter with Isolators

Figure 28. Voltage-to-Frequency Converter with Isolators

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Figure 29. Voltage-to-Frequency Converter with Isolators

Figure 30. Voltage-to-Frequency Converter with Isolators

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Schematic Diagram

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REVISION HISTORY

Changes from Revision A (March 2013) to Revision B Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 15

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 PACKAGE OPTION ADDENDUM

[Link] 1-Nov-2013

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM231AN NRND PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM

231AN
LM231AN/NOPB ACTIVE PDIP P 8 40 Green (RoHS CU SN Level-1-NA-UNLIM -25 to 85 LM
& no Sb/Br) 231AN
LM231N NRND PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM
231N
LM231N/NOPB ACTIVE PDIP P 8 40 Green (RoHS SN | CU SN Level-1-NA-UNLIM -25 to 85 LM
& no Sb/Br) 231N
LM331AN NRND PDIP P 8 40 TBD Call TI Call TI LM
331AN
LM331AN/NOPB ACTIVE PDIP P 8 40 Green (RoHS CU SN Level-1-NA-UNLIM LM
& no Sb/Br) 331AN
LM331N NRND PDIP P 8 40 TBD Call TI Call TI 0 to 70 LM
331N
LM331N/NOPB ACTIVE PDIP P 8 40 Green (RoHS SN | CU SN Level-1-NA-UNLIM 0 to 70 LM
& no Sb/Br) 331N
RC4151NB NRND PDIP P 8 40 TBD Call TI Call TI 0 to 70 LM
331N
RV4151NB NRND PDIP P 8 40 TBD Call TI Call TI -25 to 85 LM
231N

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check [Link] for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

[Link] 1-Nov-2013

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

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Addendum-Page 2
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