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CELEBRATING 14 YEARS OF EXCELLENCE IN ViiSi TRAINING
VLSI Design
Internship
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My vision is to or
‘and industry-oriented
x more than 14 yea
for the VLSI training
VLSI training courses for VLSI
‘organizations across the a)
Sivakumar PR
Founder and CEO.
our
Consult
date designs
now more about out CEO.
technical expertise, han
courses with innovative
Maven Silicon
;cosystem in India, offering high:
Sivakumar PR, has 25+ years of experiance in the engineering and serniconduc
ant in the top EDA companies Ike
sand help
MAVEN-SILICON.
Maven Silicon isa leading provider of VLSI training for students and professionals. We offer 0
range of high-quality VLSI training programs andinternships, taught by experienced industry
profe ‘upskil and advance their careers in the
jonala, aimed at helping engineers
fast-growing Semiconductor in aldesign
tty, From digital design and veriication to physi
‘ond design for testing, Maven Silicon covers a wide variety of topics along with labs and
projects through Industry standard EDA tools, Our state-of-the-art training facies,
coupled with innovative training methods, provide students with hand:
strong foundation in the latest VLSI technologies. Qur curriculum is designed to meet the
nds ofthe in nstantly upd
d to keep pace with the latest advan
‘ments, In addition, Maven Silicon offers flexible scheduling options and customized training
programs to accommodate student’ b
With a commitmentto excellence and a passion for empowering students and professionals,
Maven Silicon ie d ity
lected to providing the highest quality hands-on training to help
engineers reach thei full potential in the Semiconductor industry.
1s-on training experien:
learning
3 been abel
‘quaity
ts, professios
for Industries, He has worked as a Verification
this tenure, he work
Cadence, and Mentor Graphics. During ery closely with
wvely forthe successful tape-outs of multl-milion
he EDA solutions effe
www linkedin.com/in/sivapMAVEN-SILICON.COM
Three reasons to muse with
®@ Dynamic VLSI courses designed and delivered by Industry experts
dard
ave b
Mayen Silicon is the B fining. The cou
| training canter which provides high-class ind
fon the jab opportunities and crowth in the cemiconduetor industry and we keep
designed by ind
updatin
@ Superior Trai
Jur training meth
ndus
jing Methodology and Infrastructure
to earn even complex technologies in a short spon of time and make
y Is unique. It helps our studk
them experts. 70% of the course time's dedicated to the labs. mini projects, and the inal project. Our training courses help you
‘to acquire the technical sils which are highly required to get ajob in the semiconductor industry
Hands on Learning
This program offers hands-on experiance with complex IPs, VIPs, and SoCs, and an understanding ofthe project life eyele from
rainees industry-ready.
orchitecture to synthesis, makin
EDA Partner
siemens] SMTP
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eaeMAVEN-SILICON.COM
PROGRAM DETAILS.
VLSI Design
Internship
05 Modules (08 Linux Ubuntu | EDA Toole ~ Xilinx
+ VLSIDesignFiow + Verilog Operators + Project Specification Analysis
1+ ASIC Vs FPGA * Logical operators ‘= Understanding the architecture
+ RTL Design Methodologies + Bitwise and Reduction operators, “+ Module-level implementation and
+= VLSI Design Flow Stey * Concatenation and conditional verification
+ Relational and arithmetic + Building the top-level module
«Shift and Equality operators
‘Type of assignments
Continuous assignments
Timing references
+ Introduction to Digital Electronics
+ Arithmetic Circus
+ Design specification analysis
+ Creating the design architecture
+ Data processing Circuits
+ Combinational Circuits - Design and
‘Analysis Blocking and Non-Blocking
+ Latches and Flip flops cossignments
« Shift Registers an Execution branching
+ Porttioning the design
‘= RTL coding in Verlog
‘= RTL Synthesis
Counters
+ Sequential Ciruits ~ Design and + Tosks ond Functions
Analysis
‘+ Merries and PLO + Finite Stote Machine Free Course Access
« Finite State Machine «+ Bosie FSM structure
«Moore Vs Mealy peste ace
mon FSM
coding styles.
puts
‘Advanced Verilog for Verification
«Introduction to Verilog HDL + system Tasks
‘= Compiler directives
riable Live Q&A Sessions
ing
+ File input and output
Applications of Verilog HOL cane
Verilog HDL language concept
Verilog language basics and
constructs
+ Abstraction levels
synth
sis Coding Style
= Unwanted latches,
Date Types
«= Synthest
ble operators
= RTL coding styles
+ Synthesis errs
+ Type Concept
+ Nets and registers
«+ Non-hardware equivalent
voriables
+ ArraysLSI DESIGN INTE
Your Career
Path
Maven Online VLSI Course
Upgrade to Advanced ASIC Verification Course/Advanced
Physical Design & Verification Course
Become part of the VLSI Industry
atta Main Rd, Beng
nataka 560076
AVERT
i STLICO Nl
Centre of Excellence in VLSI
00 §+9174064 79
Association & Partnerships
synopsys’ S amscy BR taceic O58 ALDEC)
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