Department of ECE
23EC1202
DIGITAL DESIGN & COMPUTER ARCHITECTURE
Session - 03
DIGITAL LOGIC SOP/POS REPRESENTATION
AND OPTIMIZATION TECHNIQUES
AIM OF THE SESSION
The primary aim of this session is to provide students with a comprehensive understanding of the representation and
optimization techniques associated with Sum-of-Products (SOP) and Product-of-Sums (POS) forms in digital logic.
INSTRUCTIONAL OBJECTIVES
This Session is designed to:
1. Illustrate the process of representing Boolean functions in Sum-of-Products (SOP) and Product-of-Sums (POS)
forms.
2. Highlight the significance of terms, minterms in SOP, and maxterms in POS & Enumerate techniques to optimize
SOP and POS expressions for better circuit efficiency.
LEARNING OUTCOMES
At the end of this session, you should be able to:
1. Understand SOP and POS Representations.
2. Interpret SOP and POS Notations.
Boolean Function or Expression
• A Boolean expression or a function is an expression which consists of binary variables
joined by the Boolean connectives AND, OR along with NOT operation.
• Minterm: A minterm is a standard product which consists of all variables in either
complemented or un-complemented form.
• Example: ABC, A’B’C, AB’C
• Maxterm: A maxterm is a standard sum which consists of all variables in either
complemented or un-complemented form.
• Example: A+B+C, A’+B’+C, A+B’+C
Minterms and Maxterms (three variable)
SOP & POS Forms
Sum of Products (SOP): The sum of products is a Boolean expression containing AND
terms, called Product terms, of one or more literals each; the sum denotes the ORing
of these terms.
Example: 𝐹(𝐴, 𝐵, 𝐶) = 𝐴′𝐵 + 𝐵𝐶 + 𝐴′𝐶
Product of Sums (POS): The product of sums is a Boolean expression containing OR
terms called Sum terms and the product denotes the ANDing of these terms.
Example: 𝐹(𝐴, 𝐵, 𝐶) = (𝐴 + 𝐵)(𝐵 + 𝐶′)(𝐴 + 𝐶′)
Canonical SOP & POS Forms
Canonical form:
All the variables must be available in each term either in true or
complemented form.
Examples: 𝐹(𝐴, 𝐵, 𝐶) = 𝐴′𝐵′𝐶 + 𝐴𝐵𝐶′ + 𝐴𝐵𝐶′
𝐹(𝐴, 𝐵, 𝐶) = (𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵′ + 𝐶′)
Representation of SOP & POS using
Min & Max terms
Sum of minterms
F(A,B,C) = A’B’C + AB’C’ + ABC’ + ABC = ∑ m (1,4,6,7)
A B C F
0 0 0 0
0 0 1 1
Product of Maxterms
0 1 0 0
0 1 1 0
F(A,B,C) = (A+B+C) (A+B’+C) (A+B’+C’) (A’+B+C’) = π M (0,2,3,5) 1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
Karnaugh Maps (K-Maps)
Introduction:
• Karnaugh Maps (K-Maps) are graphical representations used in digital logic design to simplify
Boolean expressions and optimize logical circuits.
• It takes two forms: Sum of product (SOP) & Product of Sum (POS)
Advantages of K-Maps:
• Visualization: Provides a visual representation of the Boolean function, aiding in understanding.
• Systematic Approach: Systematic grouping helps ensure that all possible combinations are
considered.
• Error Reduction: Reduces the likelihood of errors compared to manual manipulation of Boolean
expressions.
2-Variable K-Maps
• Map structure, rows & columns, Example:
cell numbering 𝑓 (𝑥1, 𝑥2) = 𝑥1’ . 𝑥2’ + 𝑥1’ . 𝑥2 + 𝑥1 . 𝑥2
• Grouping : Pair / Quad
3-Variable K-Maps
• Structure:
• Grouping :
• Oct - 8 cells
• Quad – 4 cells (1*4 or 2*2)
• Pair (2*1 or 1*2)
3-Variable K-Maps
• Example: Given Z = ∑ m (1,3,6,7) à Minimize using 3 variable K-Maps
Minimized expression
Z = A’C+AB
Don’t care Conditions in K-Mas
• In some applications the output is not specified for certain combinations of inputs.
• Don’t Care conditions : we simply don’t care what output is generated for
unspecified input cases.
• It is represented with ‘X’ in truth tables and K-maps.
• Don’t care conditions can be used for further simplification.
Don’t care Conditions in K-Maps
• Example of 3-Variable K-Maps with Don’t Care conditions:
Given F (A,B,C) = ∑ (0,2,4,5,6) + d (3,7) à Minimize using K-Map
BC 00 01 11 10
A
0 1 0 X 1
1 1 1 X 1
C’ A
X Considered as 1 if it helps in reducing the terms or literals
X taken as 0 and neglected if it does not reduce terms or literals
Minimized expression F = C’+ A
4-Variable K-Mas
Example: Given F(w,x,y,z) = ∑(1,3,4,5,6,7,11,14,15) à Minimize using K-Map
w’z
yz 00 01 11 10
wx
00 1 1 Simplified expression is
F (w,x,y,z) = w’x + yz + xy + w’z
01 1 1 1 1 w’x
11 1 1 xy
10 1
yz
4-Variable K-Maps
• Example of 4-Variable K-Maps with Don’t Care conditions:
Given F (w, x, y, z) = ∑ (1, 3, 7, 11, 15) + d (0, 2, 5) à Minimize using K-Map
Realization of Logic Diagram from Boolean function
1. Given F = x + y ’ . z 2. Given X = (A.B) + (A.C) + (A.B.C)
SELF-ASSESSMENT QUESTIONS
1. What does SOP stand for in Digital Logic?
(a) Sum-of-Products
(b) Systematic Output Procedure
(c) Simplified Output Protocol
(d) Sum-of-Processes
2. Which notation is used to represent minterms in SOP expressions?
(a) A + B
(b) A * B
(c) Σ(A, B)
(d) ∏(A, B)
SELF-ASSESSMENT QUESTIONS
3. What is the primary goal of grouping in Karnaugh Maps?
(a) To make the map look organized
(b) To create larger groups
(c) To identify adjacent cells with '1’
(d) To separate '1' and '0' values
4. How many cells are in a 2-variable Karnaugh Map?
(a) 4
(b) 8
(c) 2
(d) 16
TERMINAL QUESTIONS
Short answer questions:
1. Elaborate the concept of SOP & POS representation in digital logic with example in each case.
2. What is a Karnaugh Map (K-Map), and how does it aid in the simplification of Boolean
expressions?
3. Illustrate the term “Canonical form” in Boolean algebra with an example.
Long answer questions:
1. List out the Min & Max terms for 2 variable (A, B) and 3 variables (A,B, C).
2. Optimize the 4 variable function F ⟮A,B,C,D⟯ = ∑m ⟮0,1,4,5,6,10,13⟯ + d ⟮2,3⟯ using K-Maps.
3. F (A, B, C) = AB’C + A’B’C + A’BC + A’B’C’ + AB’C’ Simplify using k-Maps.
4. Realize the Boolean function using the logic gates X = ( A. B’ ) + ( A’.C ) + ( A.B.C’ )
REFERENCES FOR FURTHER LEARNING
Reference Books:
1. Computer System Architecture by M. Moris Mano
2. Fundamentals of Digital Logic with Verilog HDL by Stephen Brown and ZvonkoVranesic
Sites and Web links:
1. [Link]
2. [Link]
THANK YOU
Team – Digital Design & Computer Architecture
