Course Highlights: study.

The demand for ECE is increasing rapidly with

This Workshop targets in the area Design Verification, advancement of emerging technologies like Internet of
FPGAs and MEMS Design for students and faculty. Things (IoT), Artificial Technology (AI), 5G
DAY 1: Technologies, Micro and Nano Electronics, Robotics
B V Raju Institute of Session 1 & Session 2: Automation, Big data.
RESOURCE PERSONS
Introduction and Overview of FPGA Design Flow and
Technology, Narsapur Discussion on PYNQ Board
DAY 2
Mr. Venu Madhav, Application Engineer at CoreEL
Technologies with expertise in VLSI Design. His
Session 1 & 2: professional focus lies in designing and implementing
ONE WEEK STTP ON Understanding AI and ML workflows in FPGAs and advanced VLSI systems, contributing to innovative
implementation on KRIA Board solutions in the field.
“Design, Verification and DAY 3 Prof. M. C. Chinnaiah, Professor, B V Raju Institute
Session 1 & session 2: of Technology, Narsapur, Telangana, India. He has
Deployment of AI-Driven Machine Learning and AI in Robotics published many reputed journal and conference
papers and received two patents. His research areas
Systems with Kria KV 260 Vision DAY 4
include VLSI architectures, reconfigurable computing,
Session 1 & session 2:
FPGA Introduction to MEMS technology and hands on
FPGA, digital system design, embedded system design,
computer vision, and automation sciences. He is a
& training on HFSS tool
research fellow at the Cyber Security Research Centre,
DAY 5 School of Computer Science and Engineering, Nanyang
Innovations in MEMS Session 1 & session 2: Technological University, Singapore.
Technology’’ Designing and modelling of RF MEMS switch through
COMSOL and Pro Origin tool.
Dr Sk. Shaoukat Vali, Assistant Professor in ECE
Department, VNRVJIET Bachupally. His areas of
DAY 6 research interests are RF MEMS, MEMS, Tunable
Duration: 27-01-2025 TO 01-02-2025
Session 1 & Session 2: filters, Nanoscale Semiconductor Device Modeling and
Digital Design Verification using System Verilog FinFET-based Memory design for Communication on
CHIEF PATRONS Applications.
Sri K. V. Vishnu Raju, Chairman, SVES Mr. Kishore Vennela, Trainer & Lead Engineer,
Sri R. Ravichandran, Vice Chairman, SVES Design Verification at MosChip Institute of Silicon
Sri Aditya Vissam, Secretory, SVES Systems (M-ISS), A subsidiary of Moschip Technologies.
PATRONS With a strong passion for innovation, he is also an
Dr. K. Lakshmi Prasad, active researcher focused on robotics controller
Director, BVRIT, Narsapur development. His expertise bridges digital design and
Organized by
Dr. Sanjay Dubey, robotics, contributing to advancements in both areas.
VLSI Automation Team Principal, BVRIT, Narsapur Registration Fees:
Dr. B. R. Sanjeeva Reddy Students/ Research Scholar: 500/-
Faculty: 600/-
HoD. of ECE, BVRIT, Narsapur.
Industry Person – 1000/-
Coordinator: Registration Link:
Dr. Apurva Kumari, https://forms.gle/m1ZiSczoW386p4wm6
Associate Professor, ECE Dept.
ABOUT DEPARTMENT
The Electronics and Communications Engineering (ECE)
is one of the most promising branches of engineering