Selective Course (3): EPM 352
Industrial Electronics
Grading System:
Project:
25
Final Exam
Lab: 10
: 75
Total
150
Quiz &
Midterm:
Attendance
30
: 10
Course Contents:-
1. Operational Amplifier
2. Classic Control
3. Programmable logic control
4. Scada System
▪ An operational amplifier (op-amp), is a very high gain electronic voltage differential amplifier with two
inputs and a single output.
▪ Typical uses of the operational amplifier are to provide voltage amplitude changes (amplitude and
polarity), oscillators, filter circuits, and many types of instrumentation circuits.
• OP-AMPs are used to primarily perform mathematical operations such as addition, subtraction,
integration and differentiation.
• An op-amp contains a number of differential amplifier stages to achieve a very high voltage gain.
• It has two input terminals, the inverting (−) input and the noninverting (+) input. One output
terminal.
▪ Most op-amps operate with two dc supply voltages, one positive and the other negative,
▪ Some op-amps have a single dc supply.
LM741
❑Block Diagram and Differential Amplifier of an Op-Amp:
• A typical op-amp is made up of three types of amplifier circuit: a differential amplifier, a voltage
amplifier, and a push-pull amplifier, as shown in Figure.
• Input Stage: It provides amplification of the difference voltage between the two inputs. It requires
high input impedance and low output impedance. This stage provides most of the voltage gain
required.
• The gain stage is usually an amplifier that provides additional gain.
- Some op-amps may have more than one voltage amplifier stage.
• A push-pull amplifier: The basic requirement of this stage is low output impedance and high current
sourcing capability.
• The term differential comes from the amplifier's ability to amplify the difference of two input signals
applied to its inputs.
• Only the difference in the two signals is amplified; if there is no difference, the output is zero.
• A basic differential amplifier circuit and its symbol are shown in Figure (a).
• The transistors (𝑸𝟏 and 𝑸𝟐 ) and the collector resistors (𝑹𝑪𝟏 and 𝑹𝑪𝟐 ) are carefully matched to have
identical characteristics.
• Notice that the two transistors share a single emitter resistor, 𝑹𝑬 .
❑ Op-Amp Operation Modes
• The differential amplifier exhibits three modes of operation based on the type of input and output
signals.
• These modes are single-ended, double-ended or differential, and common.
(1) Single-Ended Input:
• When the input signal is connected to one input with the other input connected to ground.
• In Figure (a), the input is applied to the plus input (with minus input at ground), which results in an
output having the same polarity as the applied input signal.
• Figure (b) shows an input signal applied to the minus input, the output then being opposite in phase to
the applied signal.
(2) Double-Ended (Differential) Input:
• Signals are applied to each input.
• Figure (a) shows an input, 𝑽𝒅 , applied between the two input terminals with the resulting amplified
output in phase with that applied between the plus and minus inputs.
• Figure (b) shows the same action resulting when two separate signals are applied to the inputs, the
difference signal being 𝑽𝟏 − 𝑽𝟐 .
(3) Common-Mode Operation:
▪ In the common mode, two signal voltages of the same phase, frequency, and amplitude are applied to the
two inputs, as shown in Figure .
▪ When equal input signals are applied to both inputs, they tend to cancel, resulting in a zero output
voltage.
▪ This action is called common-mode rejection. Its importance lies in the situation where an unwanted
signal appears commonly on both op-amp inputs.
▪ Common-mode rejection means that this unwanted signal will not appear on the output and distort the
desired signal.
❑Op-amp Parameters:
(1) Common Mode Rejection Ratio (CMRR)
▪ The measure of the op-amp’s ability to reject common mode signals
▪ The CMRR is defined as follows:
𝑨
𝑪𝑴𝑹𝑹 = 𝟎𝟏
𝑨𝒄𝒎
Where 𝑨𝟎𝟏 is the open loop differential gain and the 𝑨𝒄𝒎 is the common mode signal.
▪ The higher the 𝑨𝟎𝟏 with respect to the 𝑨𝒄𝒎 , the better the performance of the op-amp.
▪ Higher the value of CMRR, the lower will be the value of common gain.
(2) Maximum output voltage swing (𝑽𝒐 𝒑−𝒑 )
▪ This parameter indicate the maximum limit of the peak output voltage.
▪ The ideal limit is ±𝑽𝒄𝒄 , where +𝑽𝒄𝒄 𝒂𝒏𝒅 − 𝑽𝒄𝒄 are the dc supply voltage of the op-amp.
▪ For practical op-amps, the limit approaches the ideal value. i.e. if ±𝑽𝒄𝒄 = ±𝟏𝟐 𝑽, then 𝑽𝒐 𝒑−𝒑 ≅
± 𝟏𝟎 𝑽.
(3) Input Offset Voltage (𝑽𝒐𝒔 )
▪ The input offset voltage is the differential DC voltage between the input required to force the output
to zero volt.
▪ This potential may be due to a difference between the 𝑽𝑩𝑬 drops of the transistors in the input
differential stage of a BJT amplifier.
▪ Typical values of input offset voltage are in the range of 𝟐𝒎𝑽 or less.
▪ The output offset voltage when the input is 𝑽𝒊𝒐 is given by
𝑹𝒇 + 𝑹𝟏 𝑽𝒊𝒐
𝑽𝒐𝒔 = 𝑽𝒊𝒐 =
𝑹𝟏 𝜷
(4) Input bias Current:
▪ The input currents are the bas currents of the two transistors.
▪ It is the dc current supplied by the inputs of the amplifier to properly operate the input stage.
▪ It is the average of the two base currents.
𝑰 𝟏 + 𝑰𝟐
𝑰𝒃𝒊𝒂𝒔 =
𝟐
(5) Input impedance:
▪ It is the total resistance between the inverting and the non-inverting inputs.
▪ It is the ratio of change in the differential input voltage and change in the bias current.
(6) Output Impedance:
▪ It is the resistance viewed from the output terminal of the op-amp as shown below:
(7) Slew Rate:
▪ It is not possible for any waveform, input or output, to change from one level to another in zero time.
▪ The maximum rate of change of the output voltage in response to a step input voltage.
∆𝑽𝒐𝒖𝒕
Slew rate =
∆𝒕
❑ Characteristics of an ideal op-amp
▪ An ideal op-amp is a device which acts as an ideal voltage controlled voltage source.
▪ This implies that the device will have the following characteristics:
▪ No current flows into the input terminals of the device. This is equivalent to having an infinite input
resistance 𝑹𝒊 = ∞.
▪ Have a zero output resistance (𝑹𝒐 = 𝟎). This implies that the output voltage is independent of the
load connected to the output.
5. Infinite CMRR
6. Infinite slew rate.
❑ Negative Feedback Amplifiers.
▪ With two resistors we can construct the fundamental feedback network of a negative feedback
amplifier.
▪ the fundamental negative feedback configuration can be in the inverting amplifier arrangement,
where the input signal, 𝑽𝒊𝒏 , is applied to the inverting terminal, Figure (a),
▪ OR in the non-inverting amplifier arrangement, where the input signal, 𝑽𝒊𝒏 , is applied to the non-
inverting terminal, Figure (b).
▪ We will perform the analysis by considering both the effect of finite open loop gain (A is finite) and the
ideal op-amp model for which A →∞.
(1) Inverting Amplifier
▪ From Figure, we see that 𝑽𝒑 is at ground potential (𝑽𝒑 = 𝟎𝑽).
▪ Since 𝑽𝒑 = 𝑽𝒏 , the voltage 𝑽𝒏 must also be at zero Volts. This does not mean that the inverting
terminal is grounded.
▪ It simply implies that the inverting terminal is at ground potential (zero volts) but it does not
provide a current path to ground. This terminal is said to be at “virtual ground”.
▪ Since 𝑰𝒏 = 𝑰𝒑 = 𝟎 , KCL at node 1 tells us that current 𝑰𝟏 must be equal to current 𝑰𝟐 .
𝑽𝒏 − 𝑽𝒐 𝑽𝒊𝒏 𝑹𝟐
𝑰𝟐 = ⇒ 𝑽𝒐 = −𝑰𝟐 𝑹𝟐 = − 𝑹 = −𝑽𝒊𝒏
𝑹𝟐 𝑹𝟏 𝟐 𝑹𝟏
▪ And so the gain of the ideal inverting amplifier is
▪ Note that the ideal gain depends only on the ratio of resistors 𝑹𝟏 𝒂𝒏𝒅 𝑹𝟐 .
▪ We are now able to design an amplifier with any desirable gain by simply selecting the appropriate
ratio of 𝑹𝟏 𝒂𝒏𝒅 𝑹𝟐 .
▪ However, this design flexibility requires a very large value of A, the open loop gain of the op-amp.
▪ Op-amp devices have been designed and manufactured with very low cost and are characterized by
very high values of A.
▪ The negative sign for the gain indicates that the polarity of 𝑽𝒐 is opposite to the polarity of 𝑽𝒊𝒏 .
▪ For example, if the input signal 𝑽𝒊𝒏 is a sinusoid of phase 0 degrees, the output signal will also be a
sinusoid with a phase shift of 180 degrees.
▪ Figure shows the voltages 𝑽𝒊𝒏 and 𝑽𝒐 for an inverting amplifier with 𝑹𝟐 /𝑹𝟏 = 𝟐.
Figure: Input and output signals of an inverting amplifier with gain of 2.
(2) Non-Inverting Amplifier
▪ The negative feedback is maintained, and the input signal is now applied to the non-inverting terminal.
▪ Referring to Figure, the ideal model implies the voltages at nodes 1 and 2 are equal: 𝑽𝒏 = 𝑽𝒊𝒏 .
▪ Also, since no current flows into the terminals of the op-amp,
▪ KCL at node 1 gives,
▪ 𝑰𝟏 = 𝑰𝟐
𝑽𝒊𝒏 𝑽𝒊𝒏 −𝑽𝒐
▪ 𝑰𝟏 = − , 𝑰𝟐 =
𝑹𝟏 𝑹𝟐
▪ Solving for the gain (𝑽𝒐 /𝑽𝒊𝒏 ) we have,
𝑽𝒐 𝑹𝟐
𝑮= =𝟏+
𝑽𝒊𝒏 𝑹𝟏
❑ Voltage follower (Unity gain amplifier)
➢ If feedback resistor 𝑅2 = 0 (short circuit) or 𝑅1 = ∞ (open circuit) or both, the gain becomes 1.
➢ Under these conditions, the circuit is called a voltage follower because the output follows the input,
So
➢ Such a circuit has a very high input impedance and is therefore useful
as an intermediate-stage (or buffer) amplifier to isolate one circuit
from another
➢ The voltage follower minimizes interaction between the two stages and
eliminates interstage loading.
Example:
6𝑉
Example:
Example:
Example:
❑Applications of Operational Amplifiers
(1) Summing Amplifier
➢ The summing amplifier is a variation of the inverting amplifier. It takes advantage of the fact that the
inverting configuration can handle many inputs at the same time.
➢ keep in mind that the current entering each op amp input is zero.
➢ in applications where a noninverted sum is required, it can be obtained using the inverting circuit,
followed by a unity-gain inverter.
The optimum value of the compensation resistor is
Example: Calculate 𝒗𝒐 and 𝒊𝟎 in the op amp circuit in Figure
Solution:
Example:
(2) Difference (Subtractor) Amplifier
▪ The signals are connected to the inverting and noninverting terminals
▪ Applying KCL to node a
𝑽𝟏 −𝑽𝒂 𝑽𝒂 −𝑽𝒐
=
𝑹𝟑 𝑹𝟒
𝑹𝟒 𝑹𝟒
𝑽𝒐 = + 𝟏 𝑽𝒂 − 𝑽
𝑹𝟑 𝑹𝟑 𝟏
▪ Applying KCL to node b
𝑽𝟐 −𝑽𝒃 𝑽𝒃 −𝟎 𝑹𝟐
= 𝑽𝒃 = 𝑽
𝑹𝟏 𝑹𝟐 𝑹𝟏 +𝑹𝟐 𝟐
▪ But 𝑽𝒂 = 𝑽𝒃 𝑹𝟒 𝑹𝟐 𝑹𝟒
𝑽𝒐 = +𝟏 𝑽 − 𝑽
𝑹𝟑 𝑹𝟏 + 𝑹𝟐 𝟐 𝑹 𝟑 𝟏
▪ If 𝑹𝟐 = 𝑹𝟏 and 𝑹𝟑 = 𝑹𝟒 , the difference amplifier becomes a subtractor, with the output
𝑽𝒐 = 𝑽𝟐 − 𝑽𝟏
Exercise : Design an operational-amplifier circuit using the differential configuration to produce the
output 𝑽𝒐 = 𝟎. 𝟓 𝑽𝟐 − 𝟐 𝑽𝟏 . Assume 𝑹𝟒 = 𝟏𝟎𝟎 𝒌𝛀.
Solution:
Since, 𝑽𝒐 = 𝟎. 𝟓 𝑽𝟐 − 𝟐 𝑽𝟏
𝑹𝟒 𝑹𝟐 𝑹𝟒
𝑽𝒐 = +𝟏 𝑽𝟐 − 𝑽
𝑹𝟑 𝑹𝟏 + 𝑹𝟐 𝑹𝟑 𝟏
𝑹𝟒 𝑹𝟐
∴ +𝟏 = 𝟎. 𝟓
𝑹𝟑 𝑹𝟏 +𝑹𝟐
𝑹𝟒 𝟏𝟎𝟎
∴ = 𝟐 ⇒ 𝑹𝟑 = = 𝟓𝟎 𝒌Ω
𝑹𝟑 𝟐
𝑹𝟐 𝑹𝟐 𝟏
𝟎. 𝟓 = 𝟐 + 𝟏 ⇒ =
𝑹𝟏 + 𝑹𝟐 𝑹𝟏 + 𝑹𝟐 𝟔
𝑹𝟏 = 𝟓 𝑹𝟐
If we choose 𝑹𝟐 = 𝟏𝟎 𝒌Ω ⇒ 𝑹𝟏 = 𝟓𝟎𝒌Ω