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Chapter 3

Chapter 3 of the document discusses the ARM Instruction Set Architecture, focusing on the ARM Cortex-M microcontrollers. It outlines the different ARM Cortex families, assembly instructions, and directives used in assembly language programming. The chapter provides details on instruction formats, data allocation, and the structure of assembly programs.

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0% found this document useful (0 votes)
28 views28 pages

Chapter 3

Chapter 3 of the document discusses the ARM Instruction Set Architecture, focusing on the ARM Cortex-M microcontrollers. It outlines the different ARM Cortex families, assembly instructions, and directives used in assembly language programming. The chapter provides details on instruction formats, data allocation, and the structure of assembly programs.

Uploaded by

khoanguyen1511kg
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Embedded Systems with ARM Cortex-M Microcontrollers

in Assembly Language and C

Chapter 3
ARM Instruction Set Architecture

Dr. Yifeng Zhu


Electrical and Computer Engineering
University of Maine

Spring 2018

1
History

2
ARM Cortex Processors
 ARM Cortex-A family:
 Applications processors
 Support OS and high-
performance applications
 Such as Smartphones, Smart TV
 ARM Cortex-R family:
 Real-time processors with high
performance and high reliability
 Support real-time processing and
mission-critical control
 ARM Cortex-M family:
 Microcontroller
 Cost-sensitive, support SoC

3
Instruction Sets

4
Instruction Sets

5
from arm.com
From C to Assembly

6
Load-Modify-Store

7
Load-Modify-Store

8
ARM Cortex-M3 Organization (STM32L1)

SW/JTAG LCD SPI2


TIM2 I2C1
TIM4 I2C2
Cortex-M3 Processor Core Instructions TIM6 USB 2.0 FS
Flash TIM7 DAC1
Instruction Bus Memory USART2

Instruction Fetch Unit


Instruction Decoder DAC2
Interrupt Controller

Processor Control

USART3 USB RAM

Interface
Data
Trace & Debug

Memory
Memory SRAM WWDG

AHB Bus Matrix


`
Interface

Protection
(NVIC)

ALU
Unit

Interrupts Unit (MPU) Advanced High-


performance Bus
APB1 Advanced
Data Bus (AHB) AHB to APB Bridge 1
Peripheral Bus
AHB to APB Bridge 2 (APB)
ABP2
System Bus
GPIO Port A
GPIO Port B
EXT ADC
GPIO Port C
Direction Memory WKUP TIM9
GPIO Port D
Access (DMA) GPIO Port E SPI1 TIM10
Controller GPIO Port H USART1 TIM11

System-on-a-chip

9
ARM Cortex-M4 Organization (STM32L4)

LCD SPI2
TIM2 SPI3
TIM3 I2C1/SMBUS
SW/JTAG
TIM4 I2C2/SMBUS
TIM6 I2C3/SMBUS
TIM7 USB 2.0 FS
Cortex-M4 Processor Core Instructions USART2 bxCAN
Flash
USART3 SWPMI1
Instruction Bus Memory

Instruction Fetch Unit


USART4 LPTIM1
Instruction Decoder
Multiple Data (DSP)
Interrupt Controller

Processor Control

Single Instruction

USART5 LPTIM2

Interface
Data

Memory
Trace & Debug

FPU (optional)

Memory SRAM OpAmp

AHB Bus Matrix


LPUART1
Interface

` Protection
(NVIC)

ALU
Unit

Interrupts Unit (MPU) Advanced High-


performance Bus
APB1 Advanced
Data Bus (AHB) AHB to APB Bridge 1
Peripheral Bus
AHB to APB Bridge 2 (APB)
ABP2
System Bus
GPIO Port A
GPIO Port B
EXTI SPI1
GPIO Port C
Direction Memory GPIO Port D WKUP SAI1
Access (DMA) GPIO Port E TIM1/PWM SAI2
Controllers GPIO Port F TIM8/PWM DFSDM
GPIO Port G TIM15 COMP1
GPIO Port H TIM16 COMP2
TIM17 Firewall
USART1
System-on-a-chip

10
Assembly Instructions Supported
 Arithmetic and logic
 Add, Subtract, Multiply, Divide, Shift, Rotate
 Data movement
 Load, Store, Move
 Compare and branch
 Compare, Test, If-then, Branch, compare and branch on zero
 Miscellaneous
 Breakpoints, wait for events, interrupt enable/disable, data
memory barrier, data synchronization barrier

11
ARM Instruction Format
label mnemonic operand1, operand2, operand3 ; comments

 Label is a reference to the memory address of this instruction.


 Mnemonic represents the operation to be performed.
 The number of operands varies, depending on each specific instruction.
Some instructions have no operands at all.
 Typically, operand1 is the destination register, and operand2 and operand3 are
source operands.
 operand2 is usually a register.
 operand3 may be a register, an immediate number, a register shifted to a
constant amount of bits, or a register plus an offset (used for memory access).
 Everything after the semicolon “;” is a comment, which is an annotation
explicitly declaring programmers’ intentions or assumptions.

12
ARM Instruction Format

label mnemonic operand1, operand2, operand3 ; comments

target ADD r0, r2, r3 ; r0 = r2 + r3

label mnemonic destination 1st source 2nd source comment


operand operand operand

13
ARM Instruction Format

label mnemonic operand1, operand2, operand3 ; comments

Examples: Variants of the ADD instruction


ADD r1, r2, r3 ; r1 = r2 + r3
ADD r1, r3 ; r1 = r1 + r3
ADD r1, r2, #4 ; r1 = r2 + 4
ADD r1, #15 ; r1 = r1 + 15

14
First Assembly

15
First Assembly

16
First Assembly

17
Assembly Directives
 Directives are NOT instruction. Instead, they are used to
provide key information for assembly.
AREA Make a new block of data or code
ENTRY Declare an entry point where the program execution starts
ALIGN Align data or code to a particular memory boundary
DCB Allocate one or more bytes (8 bits) of data
DCW Allocate one or more half-words (16 bits) of data
DCD Allocate one or more words (32 bits) of data
SPACE Allocate a zeroed block of memory with a particular size
FILL Allocate a block of memory and fill with a given value.
EQU Give a symbol name to a numeric constant
RN Give a symbol name to a register
EXPORT Declare a symbol and make it referable by other source files
IMPORT Provide a symbol defined outside the current source file
INCLUDE/GET Include a separate source file within the current source file
PROC Declare the start of a procedure
ENDP Designate the end of a procedure
END Designate the end of a source file

18
Directive: AREA
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section


EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The AREA directive indicates to the assembler the start of a new data or code section.
 Areas are the basic independent and indivisible unit processed by the linker.
 Each area is identified by a name and areas within the same source file cannot share the
same name.
 An assembly program must have at least one code area.
 By default, a code area can only be read (READONLY) and a data area may be read from
and written to (READWRITE).
19
Directive: ENTRY
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section


EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The ENTRY directive marks the first instruction to be executed within an application
program.
 There must be exactly one ENTRY directive in an application, no matter how many
source files the application has.

20
Directive: END
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section


EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The END directive indicates the end of a source file.


 Each assembly program must end with this directive.

21
Directive: PROC and ENDP
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section


EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 PROC and ENDP are to mark the start and end of a function (also called subroutine or
procedure).
 A single source file can contain multiple subroutines, with each of them defined by a pair
of PROC and ENDP.
 PROC and ENDP cannot be nested. We cannot define a function within another function.

22
Directive: EXPORT and IMPORT
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section


EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The EXPORT declares a symbol and makes this symbol visible to the linker.
 The IMPORT gives the assembler a symbol that is not defined locally in the current
assembly file. The symbol must be defined in another file.
 The IMPORT is similar to the “extern” keyword in C.

23
Directive: Data Allocation

Directive Description Memory Space


DCB Define Constant Byte Reserve 8-bit values
DCW Define Constant Half-word Reserve 16-bit values
DCD Define Constant Word Reserve 32-bit values
DCQ Define Constant Reserve 64-bit values
DCFS Define single-precision Reserve 32-bit values
floating-point numbers
DCFD Define double-precision Reserve 64-bit values
floating-point numbers
SPACE Defined Zeroed Bytes Reserve a number of zeroed bytes
FILL Defined Initialized Bytes Reserve and fill each byte with a value

24
Directive: Data Allocation
AREA myData, DATA, READWRITE
hello DCB "Hello World!",0 ; Allocate a string that is null-terminated

dollar DCB 2,10,0,200 ; Allocate integers ranging from -128 to 255

scores DCD 2,3.5,-0.8,4.0 ; Allocate 4 words containing decimal values

miles DCW 100,200,50,0 ; Allocate integers between –32768 and 65535

Pi DCFS 3.14 ; Allocate a single-precision floating number

Pi DCFD 3.14 ; Allocate a double-precision floating number

p SPACE 255 ; Allocate 255 bytes of zeroed memory space

f FILL 20,0xFF,1 ; Allocate 20 bytes and set each byte to 0xFF

binary DCB 2_01010101 ; Allocate a byte in binary

octal DCB 8_73 ; Allocate a byte in octal

char 25 DCB ‘A’ ; Allocate a byte initialized to ASCII of ‘A’


Directive: EQU and RN
; Interrupt Number Definition (IRQn)
BusFault_IRQn EQU -11 ; Cortex-M3 Bus Fault Interrupt
SVCall_IRQn EQU -5 ; Cortex-M3 SV Call Interrupt
PendSV_IRQn EQU -2 ; Cortex-M3 Pend SV Interrupt
SysTick_IRQn EQU -1 ; Cortex-M3 System Tick Interrupt

Dividend RN 6 ; Defines dividend for register 6


Divisor RN 5 ; Defines divisor for register 5

 The EQU directive associates a symbolic name to a numeric constant. Similar to the
use of #define in a C program, the EQU can be used to define a constant in an
assembly code.
 The RN directive gives a symbolic name to a specific register.

26
Directive: ALIGN

AREA example, CODE, ALIGN = 3 ; Memory address begins at a multiple of 8


ADD r0, r1, r2 ; Instructions start at a multiple of 8

AREA myData, DATA, ALIGN = 2 ; Address starts at a multiple of four


a DCB 0xFF ; The first byte of a 4-byte word
ALIGN 4, 3 ; Align to the last byte (3) of a word (4)
b DCB 0x33 ; Set the fourth byte of a 4-byte word
c DCB 0x44 ; Add a byte to make next data misaligned
ALIGN ; Force the next data to be aligned
d DCD 12345 ; Skip three bytes and store the word

27
Directive: INCLUDE or GET
INCLUDE constants.s ; Load Constant Definitions
AREA main, CODE, READONLY
EXPORT __main
ENTRY
__main PROC
...
ENDP
END

 The INCLUDE or GET directive is to include an assembly source file within


another source file.
 It is useful to include constant symbols defined by using EQU and stored in a
separate source file.

28

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