Electric Vehicle Power Converter
Dr. Shimi S.L
Associate Professor
Electrical Engineering Dept
PEC (Deemed to be University), Chandigarh
Bidirectional three-level DC–DC converter
• Non-isolated two-level single-phase or
multiphase interleaved converters and many
varieties of isolated soft-switched DC–DC
converters
• The converter steps down the voltage when
breaking occurs that is supplied to the ultra-
capacitor. In running condition, the ultra-
capacitor is discharged, at the same time, the
converter steps up the voltage that is fed to the
motor.
• Ultra-capacitor is a high-energy storage
device that consists of double-layer porous
electrodes of activated carbon, with a
specific surface area of 2000 m2. The
carbon electrodes are separated by a
porous membrane (separator), dipped in a
solvent electrolyte, which constitutes one
cell that outputs a voltage of 1–2.8 V.
• AC motor is rated at 800-V DC. In order to achieve high voltages for
driving a motor, 780 - 279 such cells are connected in series to
achieve a voltage of 780 V.
• Ultra-capacitors have a specific capacitance of 250 F/g.
Bidirectional three-level DC–DC converter
• Ratio of DC bus voltage
to ultra-capacitor voltage
should be >2 and the
voltage applied on
switches should be at
most half of the DC bus
voltage for increased
operational efficiency.
Since the DC bus voltage
may go beyond 800 V, the
switches have to be rated
at 1200 V
• System’s overall performance is increased.
• Cost reduction as switches need not to be rated more than the
DC bus voltage, which results in the manufacturing cost of such
switches.
• MOSFET switches are preferred because they can be operated at
high frequencies. Higher switching frequencies, the inductor and
the core losses can be reduced.
• The buck–boost converter’s specifications :
(i) The system is supplied with 400 V to 50 Hz industrial network.
(ii) The DC bus voltage is maintained as converter’s input, which
may vary between 450 and 800 V.
(iii) The ultra-capacitor is connected at the output stage of the
converter that may vary from 0 to780 V.
• During the braking, the motor produces a back-emf that will
follow the opposite to the DC bus voltage.
• Braking is applied, the back-emf is bypassed to the ultra-
capacitor for storing via power converter module
interconnection, in which the three-level buck–boost topology
is used.
• To filter out any ripples during the back-emf from the motor,
filter capacitors are used. They need to fulfill two criteria:
capacitor’s peak and ripple current and the input voltage
ripple.
• Capacitor and Inductor size is small and switching losses are
low.
• In stage A, the converter can
work only if the duty cycles
are lower than 1/2. In this
stage, the switches SW1B and
SW2A remain closed, while
SW1A and SW2B are opened.
As the current iC0 is assumed
to be positive according to
the circuit diagram, the
currents i1B and i2A are
negative, and the FWDs D1B
and D2A are conducting. The
output voltage is VOUT = 0,
and, therefore, the current
iC0 decreases.
• In stage B, the switches SW1A
and SW2A remain closed and
SW1B and SW2B are opened.
The current i1A is positive and
i2A is negative, and the FWD
D2A is conducting. The filter
capacitor C1 is discharged by
the current i1A. The output
voltage is VOUT = VC1. The
current iC0 decreases or
increases, depending on the
duty cycle.
• In Stage C, the switches
SW1B and SW2B remain
closed, while SW1A and
SW1B are opened. The
current i2B is positive and i1B
is negative, and the FWD D1B
is conducting. The filter
capacitor C2 is discharged by
the current i2B. The output
voltage is VOUT = VC2. The
current iC0 would decrease or
increase, depending on the
duty cycle.
• In stage D, the converter
can work only if the duty
cycles are greater than
1/2. The switches SW1A
and SW2B remain closed,
while SW1B and SW2A are
opened. The switches’
currents i1A and i2B are
positive. The output
voltage is VOUT = VBUS,
and, therefore, the current
iC0 increases.
Graph of ultra-capacitor voltage
Graph of ultra-capacitor current
Graph of ultra-capacitor SOC
dc-dc converter connected to a voltage balancing circuit before connected to
the T-type MLI
• Three-level T-type converter
(3LT2C)
• Lower harmonic distortion and
less electromagnetic
interference (EMI)
• Rectifiers, grid-connected
converters, the Multilevel
Energy Generation System and
High Power Traction.
• Parallel operation of converters is a well-known scheme for
achieving higher power level.
• The differences of the parallel converters in parameters, such as
inductors, converter currents, the dead time, always exist.
Consequently, zero-sequence circulating currents (ZSCCs) will be
generated for the parallel system with common DC-bus and AC-
bus.
• The ZSCCs will lead to waveform distortion and extra power loss.
Therefore, ZSCCs suppression is one of the main challenges in
3LT2C parallel system with the sharing DC-bus and AC-bus
directly.
• The paths of ZSCCs are cut off by adding isolated transformer in
ac-side. However, the transformer will increase the size, weight,
and cost of converters.
• Interphase reactor is adopted, zero vectors based on SVPWM is
adopted to suppress the low-frequency ZSCCs, deadbeat control
strategy, feed-forward strategy ,SHE-PWM prevent ZSCCs.
N parallel 3LT2Cs
Resonant Power Converter
structure of resonant power converter
• Conventional hard-switching converters suffer from the limitations like the
upper limit on switching frequency, high electromagnetic interference
(EMI), more switching losses, large size, increased weight and low
efficiency. Overcome limitations - resonant converters
• Number of reactive elements present in a given resonant converter topology,
classified as two-element, three-element, and multi-element resonant
converters
• Depending upon the connection of inductive (L) and capacitive (C) elements
with respect to transformer winding, these converter topologies are further
categorized as series, parallel (two-elements), inductor–inductor–capacitor
(LLC) (three-element) and capacitor–inductor–inductor– capacitor (CLLC)
(Multi-elements).
Two-element eight combination
tank A, tank B, tank C and tank D are used for voltage source resonant converters, tank E, tank F, tank G and tank H
are used for current source resonant converter
The input impedance of the resonant tank circuit needs to be different
depending on the type of input source:
Voltage source
• The input impedance of the resonant tank circuit should be infinite at
high frequency to limit the high-frequency input current.
Current source
• The input impedance of the resonant tank circuit should be zero at
high frequency to restrict high-frequency components of input
voltage.
Three-element twenty-six combination (a) Two-inductors and one capacitor tank circuit (b) Two-capacitors and one
inductors tank circuit. (In the lower right corner, the resonant tank that is suited for input voltage source and input
current source is designated by V and I )
Advantages of Resonant Converters
• Resonant converters can help achieve fast charging,
and decreased losses by offering zero voltage and
current switching, leading to minimizing range anxiety.
• Resonant converters provide galvanic isolation, soft
switching and high-power density.
• help to achieve V2G, and V2H mode of operations of
EV chargers due to their capability of allowing the
bidirectional flow of power.
• Resolve the issues of electromagnetic interference
• The resonant converter loses its ZVS capability if switching
frequency, fs is less than the resonant frequency, fr .
Classification of Soft Switching
Resonant Converter
(a) Half-bridge series-resonant converter
(b) Half-bridge parallel-resonant converter
Half-bridge series–parallel converter
• Offer high efficiency, zero-
voltage switching (ZVS
turn-on, turn-off) and low
voltage stress on switches
and high power density.
• zero-voltage switching
(ZVS) turn-on and zero-
current switching (ZCS)
turn-off operation
• higher power density by
operating at a higher Half-Bridge LLC converter
frequency which will
reduce the size of the
transformer. Q-factor is defined as the ratio of the
inductive reactance to the resistance R of the
• transformer provides resistor, representing the selectivity and
galvanic isolation sharpness of the resonance.
Mode 1 switch S2 off-state. The inductor
current Ir , flowing through Lr is negative.
Mode II, the inductor current, Ir is positive
and S1 is in on-state.
Mode III both the inductor current, Ir and
Im are same
Benefits of LLC
converter
Multilevel two quadrant DC/DC converter
for regenerative braking
• The need of a low weight, smaller volume, and highly efficient converter for
electric vehicles in mobile applications is intended. In electric traction during
braking the energy is dissipated in traditional method. But here we use SC to
store energy. The control of energy between the DC bus and super-capacitor
(SC) is maintained. The voltage in SC is also maintained.
• For regenerative braking application, to store huge energy, a large SC is
needed. Need large number of elements in series with the capacitor. The
voltage is imbalanced across the elements because of different values of the
capacitor for the same current. It will cause damage to the cell and produce
overvoltage. To rectify it, we use passive- and active-based devices.
• Multilevel converter has different levels. The output inductance is reduced by
increasing frequency. Low-voltage transistor produces high switching
frequency and high current. This converter is beneficial in cost and
performance but has complexity in controlling.
Output Inductor
Energy stored
Depending on the connection point of SC
and connection of cells, three topologies
can be derived:
• cascaded buck,
• cascaded boost and
• multilevel buck topology
Cascaded buck, cascaded boost and multilevel buck three level converters.
• For Cascaded Buck Topology (CBk), U2 is the DC bus voltage and U1, is
the sum of all the SC voltages. When U, = 2: U, (D = 0,5), Equation can
be written. Filter at DC bus
• Assume energy stored in the filter is equal
to 1% of the energy stored in the output SC bank
inductance for one level converter, then Eq.
for N levels can be written,
this energy is divided in N inductors.
For the Cascaded Boost converter (CBt), SC voltages are U2, and the DC bus voltage is
U1. In this topology, to maintain the same power when the SC voltages are the half,
current has to double. So the current ripple through the inductance is also doubled as
shown in Eq. (6) when U1 = 2 U2. Filter at SC bank
DC bus
Although the inductance value is four times smaller, the energy stored
is the same that in the cascaded buck output inductance.
• Multilevel Buck converter, the inductance is the same as in the
Cascaded Buck for the first level, but when the number of levels
increase, the inductance has to be calculated as,
• where,
is the equivalent duty cycle at the point A3 where
the maximum ripple occurs.
, is the output inductor ripple.
is the equivalent frequency (fs, is the switching frequency).
N is the number of series connected converters.
Umax and Umin are the maximum and the minimum voltages at the A3
point in Fig. These voltages can be calculated by Eq.
• The energy reduction is proportional to the inverse square of the
number of cells, so energy is given by
The total magnetic energy for the Cascaded Buck converters increases as
the number of series connected converters increase because the number
of input filters needed increases.
On the other hand, the total magnetic energy of the Cascaded Boost
remains constant because there is no need for an input filter inductance.
multilevel modular DC/DC converter
PWM Inverter
Dual inverter fed open winding Switching strategies at different
interior PMSM circuit operating region
• High power and high efficiency drive
• Specialized continuous pulse with modulation (SCPWM), Specialised
discontinuous pulse with modulation (SDPWM) and low switching frequency
synchronised one pulse (1P). CPWM, DPWM reduce switching loss.
• Both inverter operate at 2L ( 2 Level)
• Improves efficiency at low speed and medium speed
• One end of the open winding motor is fed by a low switching frequency
multilevel inverter and the other end by a high switching frequency two level
(2L) inverter. The phase voltage reference waveforms of the high frequency
(2L) inverter are suitably calculated to mitigate the presence of low order odd
output voltage and current harmonics (5th , 7th , etc.) at the output of low
frequency multi-level inverter. The low frequency multilevel inverter is
supplied from an independent power source whereas, the high frequency two
level (2L) inverter is connected to a capacitor which acts as an active power
filter.
• High low frequency harmonic phase current ripple will also lead to large low
frequency torque ripple and hence, high motor acoustic noise.
Conventional (DPWM+DPWM) 5000 r/min, 18 Nm Conventional (1P+CPWM) 5000 r/min, 18 Nm
Proposed (1P+SCPWM) 5000 r/min, 18 Nm
