0% found this document useful (0 votes)
80 views2 pages

Low Power VLSI Design Course Outline

The document outlines the course structure for 'Low Power VLSI Design' (MLEL205), detailing prerequisites, course outcomes, and assessment methods. It covers various units focusing on low power design techniques, including supply voltage scaling, circuit logic optimization, leakage power minimization, and advanced design techniques. The document also lists recommended textbooks and online resources for further learning.

Uploaded by

sheshadri.lel24
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
80 views2 pages

Low Power VLSI Design Course Outline

The document outlines the course structure for 'Low Power VLSI Design' (MLEL205), detailing prerequisites, course outcomes, and assessment methods. It covers various units focusing on low power design techniques, including supply voltage scaling, circuit logic optimization, leakage power minimization, and advanced design techniques. The document also lists recommended textbooks and online resources for further learning.

Uploaded by

sheshadri.lel24
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Course Title Low Power VLSI Design

Course Code MLEL205 Credits L-T-P [Link]


CIE 50Marks(100% weightage) SEE 100 Marks (50%
weightage)
Prerequisites: CMOS VLSI Design
Course outcomes:
At the end of the course, the student will have the
ability to:
CO-1 Extend the knowledge on basics of MOSFETs and Power Dissipation in P03
MOS circuits to obtain thc concepts of different techniques for
optimization. power
CO-2 Ability to analyze various techniques to minimize
during the design at different levels of abstraction. power dissipation PO3
CO-3 Ability to design the power optimisedcircuit for the given specification PO3
CO-4 Design low power circuits using EDA tools and demonstrate
with report the design P01,2
Unit-I
Introduction: Need for low power VLSI chips,
circuit current in CMOS leakage current, static charging and discharging capacitance, short
low power figure of merits. Simulation power current, basic principles of low power design,
simulation. analysis: SPICE circuit simulation, Monte Carlo

Unit-II
Supply Voltage Scaling Approaches: Device feature
Architectural level approaches: Parallelism, Pipelining size scaling Multi-Vdd Circuits
transformations Dynamic voltage scaling Power Management Voltage scaling using high-level
Clock Gating Logic styles
Unit-III
Circuit and Logic: Transistor and
Logic Encoding, State Machine Gate Sizing. Equivalent Pin Ordering, Signal Encoding,
Networks, CMOS Floating Node,Encoding, pre-computation logic, Power Reduction in Clock
Low Power Bus
Unit-IV
Leakage Power minimization
approach Multi-threshold-voltageApproaches: Variable-threshold-voltage CMOS (VTCMOS)
CMOS (MTCMOS)
stacking Dual-Vt assignment approach approach Power gating Transistor
(DTCMOS)
Unit-V
Advanced Techniques: Adiabatic
System Design, Energy Aware Computation, Asynchronous circuits.
synthesis Routing. Battery-Driven
Variation tolerant design, CAD tools for low power
Text books:

1. "CMOS VLSI Design: A Circuits and Systems Perspective", Neil H. E Weste and
David Harris, Pearson Education, 4" edition, 201|,ISBN: 0-321-54774-8.
2. "Practical Low Power Digital VLSI Design", Gary Ycap, Kluwer Academic
Publishers, 1998.
3. "Low Power VLSICircuits and Systems", Ajit Pal, Springer, 2015. ISBN 978-81
322-1936-1.
4. Sung Mo Kang. Yusuf Leblebici, CMOS Digital Integrated Circuits, Tata Mcgrag
Hill.
5. A. Bellamour, and M. I. Elmasri, Low Power VLSI CMOS Circuit
Design, KluwerAcademic Press, 1995.
Reference Books:

1 Anantha P. Chandrakasan and Robert W. Brodersen, Low Power Digital CMOS Design,
Kluwer Academic Publishers, 1995.
2. Kaushik Roy and Sharat C. Prasad, Low-Power CMOS VLSI Design, Wiley-Inter science,
2000.

3. Kiat-Seng Yeo and Kaushik Roy, Mc-Graw-Hill Low-Voltage Low-Power CMOS VLSI
Subsystems. 2005
E-Book:

1. http:/[Link]/education/projectovanje VLSI/predavanja/10%20Low%20Power%20
Design%20in%20 VLSlpdf
MOOC/Online course:
1. NPTEL [Link] Computer Science and Engineering, Department of Computer
Science and Engineering ,IIT Kharagpur

You might also like