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Model Question Paper-III With Effect From 2022: Digital Design and Computer Organization (BCS302)

This document is a model question paper for the Third Semester B.E Degree Examination in Digital Design and Computer Organization (BCS302), effective from 2022. It contains various questions divided into five modules, covering topics such as Boolean functions, Verilog programming, digital circuit design, computer architecture, and addressing modes. Students are required to answer any five full questions, ensuring at least one question is chosen from each module.

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376 views2 pages

Model Question Paper-III With Effect From 2022: Digital Design and Computer Organization (BCS302)

This document is a model question paper for the Third Semester B.E Degree Examination in Digital Design and Computer Organization (BCS302), effective from 2022. It contains various questions divided into five modules, covering topics such as Boolean functions, Verilog programming, digital circuit design, computer architecture, and addressing modes. Students are required to answer any five full questions, ensuring at least one question is chosen from each module.

Uploaded by

soniyaeofficial
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

lOMoARcPSD|51081091

Model Question Paper- III with effect from 2022

Third Semester B.E Degree Examination


Digital Design and Computer Organization (BCS302)
TIME: 03 Hours Max.Marks:100
1. Note: Answer any FIVE full questions, choosing at least ONE question from each MODULE
2. M: Marks, L: Bloom’s level, C: Course outcomes.

Module - 1 M L C
Q.1 a Demonstrate the working of NAND & XOR gate. 6 L2 CO1

b Explain the working of Test Bench in Verilog. 6 L2 CO1

c Simplify the following Boolean function into (i) sum-of-products form and 8 L3 CO1
(ii) product-of-sums form:

OR

a Write a program in Verilog to demonstrate the working of User-Defined 6 L1 CO1


Q.2 primitive table.
b Implement F = AB + CD using NAND gate only. 6 L3 CO1

c Simplify the following Boolean Expression using kmap: 8 L2 CO1

Module - 2 M L C
Q.3 a Design a BCD-to-excess-3 code converter. 6 L3 CO2

b Design a Full Adder and Subtractor Circuit. 6 L3 CO2

c Design an Octal-to-Binary Encoder. 8 L3 CO2

OR

Q.4 a Explain the working of Four-bit adders using 4-Full Adders. 6 L3 CO2
b Explain Dataflow Modeling in Verilog with an example program. 6 L3 CO2

c Demonstrate the working of SR Latch and Edge-Triggered D Flip-Flop. 8 L2 CO2

Module - 3 M L C
Q.5 a Describe the Big-endian and little-endian address assignment. 5 L2 CO3
Downloaded by SONIYA E ([email protected])
lOMoARcPSD|51081091

Model Question Paper- III with effect from 2022


b Demonstrate the Instruction Equation and Sequencing for C ← [A] + [B] 8 L2 CO3
with block diagram.

c With a block diagram, explain the basic functional units of a computer. 7 L2 CO3
OR

a With relevant example, Explain the following modes of Addressing: 10 L2 CO3


Q.6 i) Direct
ii) Register
iii) Index
iv) Base with index and offset
v) Autoincrement
b A program with 7000 machine instructions needs an average of 3 basic steps 5 L3 CO3
to execute one instruction. Find the performance of the computer having a
clock speed of 700 KHz.

c What are Condition Code Flags? Mention the significance of the flags N, Z, 5 L1 CO3
V and C.

Module - 4 M L C
Q.7 a 10 L3 CO1

b 5 L2 CO1

c 5 L2 CO1
OR

a 10 L3 CO1
Q.8
b 7 L2 CO1

c 3 L2 CO1

Module - 5 M L C
Q.9 a 10 L3 CO1

b 5 L2 CO1

c 5 L2 CO1
OR

a 10 L3 CO1
Q.10
b 7 L2 CO1

c 3 L2 CO1

Downloaded by SONIYA E ([email protected])

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