Antennas and L T P C

Course Code 231EC521 Course Name Course Category PC

Microwave Engineering 3 1 0 4
Transmission
Pre-requisite Progressive Course Offering Department of Electronics and Communication
Lines and Nil
Courses
Wave Guides
Courses Department Engineering

Course Learning Objectives The objective of learning this course is to:

(CLO):
CLO-1:  To understand the basic principles in antenna and microwave system design
CLO-2:  To enhance the knowledge in the area of various antenna designs.
CLO-3:  To enhance the knowledge in the antenna arrays
CLO-4:  To enhance the knowledge in the area of microwave components and antenna for practical applications
CLO-5:  To deal with the microwave generation

Program
Program Outcome (PO) Specific
outcomes
1 2 3 4 5 6 7 8 9 10 11 12

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course Outcomes
At the end of this course, learners will be able to:
(CO):
Apply the basic principles and evaluate antenna parameters and link
CO-1: 3 3 3 2 - - - - - - - 1 2 1 1
power budgets
CO-2: Design and assess the performance of various antennas 3 3 3 2 - - - - - - - 1 2 1 1
CO-3: Design and assess the antenna arrays 3 3 3 2 - - - - - - - 1 2 1 1
CO-4: Design a microwave system given the application specifications 3 3 3 2 - - - - - - - 1 2 1 1
Generate Microwave signals and design microwave amplifiers.
CO-5: 3 3 3 2 - - - - - - - 1 2 1 1
Unit-1- Introduction to Antennas 9 Hour
Definition of antenna parameters – Gain, Directivity, Effective aperture, Radiation Resistance, Band width, Beam width, Input Impedance. Matching – Baluns,
Polarization mismatch, Antenna noise temperature, Friis transmission equation, Link budget and link margin.
Unit-2- Radiation Mechanisms and Design Aspects 9 Hour
Radiation from oscillating dipole, Half wave dipole and Loop antennas Horn antenna, Reflector antenna, Slot antennas, Micro strip antennas Principle of frequency
independent antennas –Spiral antenna, Helical antenna, Log periodic.
Unit-3- Antenna Arrays and Applications 9 Hour
Two-element array, Array factor, Pattern multiplication, Uniformly spaced arrays with uniform and non-uniform excitation amplitudes, Smart antennas

Unit-4- Introduction to Microwave Systems and Devices 9 Hour

Microwave frequency bands, Noise Characterization of a microwave receiver, Terminations, Attenuators, Phase shifters, Directional couplers, Hybrid Junctions,
Power dividers, Circulator, Isolator, PIN diode switch, Gunn diode oscillator, IMPATT diode oscillator and amplifier, Varactor diode
Unit-5- Microwave Generation and Design Principles 9 Hour
Theory and application of Two cavity Klystron Amplifier, Reflex Klystron oscillator, traveling wave tube amplifier, Cylindrical Magnetron oscillator, Microwave
Amplifier Design, Microwave Mixer Design, Microwave Oscillator Design

TEXTBOOKS REFERENCE BOOK

1. [Link] “Antenna Theory Analysis and

1. John D Krauss, Ronald J Marhefka and Ahmad S. Khan,
Design”, Wiley Student Edition, 2006.
"Antennas and Wave Propagation: Fourth Edition, Tata
Learning 2. Robert E Colin, “Foundations for Microwave Engineering”, John
McGraw-Hill, 2006. (UNIT I, II, III)
Resources Wiley & Sons Inc, 2005
2. David M. Pozar, "Microwave Engineering", Fourth Edition,
3. [Link], “Antennas and Wave Propagartion”, Anuradha
Wiley India, 2012.(UNIT I,IV,V)
Agencies Publications, 2006.
 Learning Assessment
Continuous Assessment Test(CAT) (40% weight age)
Final Semester Examination
CAT-1 CAT-2 CAT-3 (60%weightage)
Bloom’s Cognitive Level of Thinking
Supporting Supporting Supporting
Test Test
Activity Activity Test (60%) Activity Test (100%)
(60%) (60%)
(40%) (40%) (40%)
CTL1 Remember 20% 10% 20% 10% 20% 10% 30%
CTL 2 Understand 30% 10% 30% 10% 30% 10% 40%
CTL 3 Apply 20% 10% 20% 10% 20% 10% 30%
CTL 4 Analyze
CTL 5 Evaluate -
CTL 6 Create - - - - - - -
Total 100% 100% 100% 100%

Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
[Link] Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 9th Board of Studies Meeting, 2 September 2023

 L T P C
Course Code 231EC523 Course Name Digital Signal Processing Course Category PC
3 0 0 3
Pre-requisite Signals and Progressive Course Offering Department of Electronics and Communication
Nil
Courses Systems Courses Department Engineering

Course Learning Objectives The objective of learning this course is to:

(CLO):
CLO-1:  To familiarize the concepts of Discrete Fourier transform, properties of DFT and its application to linear filtering
CLO-2:  To understand the characteristics of digital filters, design digital IIR filters and apply these filters to filter undesirable signals in
various frequency bands
CLO-3:  To understand the characteristics of digital filters, design digital FIR filters and apply these filters to filter undesirable signals in
various frequency bands
CLO-4:  To understand the effects of finite precision representation on digital filters
CLO-5:  To study the concept of Multi-rate adaptive filters and DSP Processor architecture

Program
Program Outcome (PO) Specific
outcomes
1 2 3 4 5 6 7 8 9 10 11 12

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course Outcomes
At the end of this course, learners will be able to:
(CO):
CO-1:  Apply DFT for the analysis of digital signals and systems 3 3 3 2 - - - - - - 1 1 2 1 1
CO-2:  Design IIR filter using Butterworth and Chebyshev techniques 3 3 3 2 - - - - - - 1 1 2 1 1
 Design FIR filter using windowing and Frequency sampling
CO-3: 3 3 3 2 - - - - - - 1 1 2 1 1
techniques
CO-4:  Characterize finite Word length effect on filters. 3 3 3 2 - - - - - - 1 1 2 1 1
 Design the Multi rate Filters and apply Adaptive Filters to
CO-5: equalization. 3 3 3 2 - - - - - - 1 1 2 1 1
Unit-1- Discrete Fourier transform 9 Hour
Review of signals and systems, Discrete Fourier transform (DFT) - properties of DFT, Linear filtering using DFT, Filtering long data sequences - overlap save and
overlap add method, Fast computation of DFT - Radix-2 Decimation-in-time (DIT) Fast Fourier transform (FFT), Decimation-in-frequency (DIF) Fast Fourier
transform (FFT), Linear filtering using FFT.
Unit-2- Infinite Impulse Response Filters 9 Hour
Structure of IIR filter, Characteristics of commonly used analog filters - Butterworth filters, Chebyshev filters. Design of IIR filters from analog filters (LPF, HPF,
BPF, BRF) - Approximation of derivatives, Impulse invariance method, Bilinear transformation. Frequency transformation in the analog domain.
Unit-3- Finite Impulse Response Filters 9 Hour
FIR filter structures - linear phase structure and direct form realizations, Design of FIR filters - symmetric and Anti-symmetric FIR filters - design of linear phase FIR
filters using Fourier series method, using windows (Rectangular, Hamming and Hanning window), Frequency sampling method.

Unit-4- Finite Word Length effects 9 Hour

Fixed point and floating point number representation - ADC - quantization - truncation and rounding - quantization noise - input / output quantization - coefficient
quantization error - product quantization error - overflow error - limit cycle oscillations due to product quantization and summation - scaling to prevent overflow
Unit-5- Introduction to Digital Signal Processor and its applications 9 Hour
Multi-rate signal processing: Decimation, Interpolation, Sampling rate conversion by a rational factor– Adaptive Filters: Applications of adaptive filtering to
equalization, DSP architecture – Fixed and Floating point architecture principles

TEXTBOOKS REFERENCE BOOK

1. John G. Proakis & Dimitris [Link], ―Digital Signal 1. A. V. Oppenheim, R.W. Schafer and J.R. Buck, ―Discrete-Time
Processing – Principles, Algorithms & Applications‖, Fourth Signal Processing, 8th Indian Reprint, Pearson, 2004.
Learning Edition, Pearson Education / Prentice Hall, 2007. 2. Sanjit K. Mitra, ―Digital Signal Processing – A Computer Based
Resources 2. Emmanuel C. I feachor& Barrie. W. Jervis, ―Digital Signal Approach, Tata McGraw Hill, 2007.
Processing, Second Edition, Pearson Education / Prentice Hall, 3. Andreas Antoniou, ―Digital Signal Processing‖, Tata McGraw
2002. Hill, 2006.
 Learning Assessment
Continuous Assessment Test(CAT) (40% weight age)
Final Semester Examination
CAT-1 CAT-2 CAT-3 (60%weightage)
Bloom’s Cognitive Level of Thinking
Supporting Supporting Supporting
Test Test
Activity Activity Test (60%) Activity Test (100%)
(60%) (60%)
(40%) (40%) (40%)
CTL1 Remember 20% 10% 20% 10% 20% 10% 30%
CTL 2 Understand 30% 10% 30% 10% 30% 10% 40%
CTL 3 Apply 20% 10% 20% 10% 20% 10% 30%
CTL 4 Analyze
CTL 5 Evaluate -
CTL 6 Create - - - - - - -
Total 100% 100% 100% 100%

Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
[Link] Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 8th Board of Studies Meeting, 2 September 2023

 Microprocessors and L T P C
Course Code 231EC524 Course Name Course Category PC
Microcontrollers 3 0 0 3
Pre-requisite Progressive Course Offering Department of Electronics and Communication
Nil
Courses Courses Department Engineering

Course Learning Objectives The objective of learning this course is to:

(CLO):
CLO-1:  To understand the Architecture of Microprocessor and Microcontroller
CLO-2:  To interface Microcontroller with supporting chips.
CLO-3:  To study the on chip peripherals and programming.
CLO-4:  To design a microcontroller based system
CLO-5:  To study the Architecture of RISC Processor.

Program
Program Outcome (PO) Specific
outcomes
1 2 3 4 5 6 7 8 9 10 11 12

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course Outcomes
At the end of this course, learners will be able to:
(CO):
CO-1: Analyze and implement programs on 8086 microprocessor. 3 3 3 1 - - - - - - 1 1 2 1 1
Interpret 8051 Microcontrollers architecture and its
CO-2: 3 3 3 1 - - - - - - 1 1 2 1 1
functionalities.
Design and develop microcontroller based systems for real
CO-3: 3 3 3 1 - - - - - - 1 1 2 1 1
time applications
Interface the peripherals and I/O devices using 8051
CO-4: 3 3 3 1 - - - - - - 1 1 2 1 1
microcontroller.
CO-5:
Analyze the architecture of RISC processors. 3 3 3 1 - - - - - - 1 1 2 1 1
Unit-1- THE 8086 MICROPROCESSOR 9 Hour
Overview of Microprocessors, 8086 – Architecture, Signals, Addressing modes , Instruction set andassembler directives ,Assembly language
programming , Stacks , Procedures ,Macros , Interrupts and interrupt service routines.
Unit-2- 8051 MICROCONTROLLER 9 Hour
Functional block diagram and pin diagram of 8051- Program Counterand ROM space in 8051-Program and Data Memory organization-addressing
modes. Instruction Set: data transfer, arithmetic and logical, program branching instructions and Boolean variable manipulation.
Unit-3- ON-CHIP PERIPHERALS AND PROGRAMMING TECHNIQUES 9 Hour
Parallel Port Structure and bit-manipulation programming, timer/counter-Operating Modes-Programming 8051 Timers - Counter Programming-Serial
Communication: Basics of Serial Communication-UART- Operating Modes-RS232 Standards-8051 connection to RS232-Serial Port Programming.
Interrupt: 8051 Interrupt- External and Internal Interrupts- Programming timer Interrupts, external hardware interrupts and serial communication
interrupts -Interrupt Priority and Programming. Power Saving Modes.
Unit-4- PERIPHERAL INTERFACING AND PROGRAMMING 9 Hour
Parallel communication interface, Serial communication interface, D/A and A/D Interface, Timer, Keyboard /display controller ,Traffic Light control
and Stepper Motor Interfacing Techniques
Unit-5- RISC ARCHITECTURE 9 Hour
Overview of RISC processor, Hybrid architecture, Advantages of RISC, Features of RISC, Design issues of RISC Processor, Performance issues in
pipelined system, Architecture of ARM7 and Sun UltraSPARC.

TEXTBOOKS REFERENCE BOOK

1. Krishna Kant, ― “Microprocessors and Microcontrollers- Architecture,

programming and system design 8085, 8086, 8051,8096”, Prentice Hall
1. Muhammad Ali Mazidi, J.G. Mazidi, R.D. McKinlay,”The of India, New Delhi, 2007.
8051 Microcontroller and Embedded Systems”, Second Edition,
Learning Prentice Hall of India Pvt. Ltd., 2007. 2. Kenneth J Ayala, ― “The 8051 Microcontroller – Architecture,
Resources Programming and Applications”, PenramInternational Publications,
2. [Link],[Link], "Advanced Microprocessors Mumbai India, 1996.
and Peripherals" 3rd edition, Tata McGrawHill, 2012
3. Doughlas [Link],”Microprocessors and Interfacing, Programming and
Hardware”, TMH, 2012
 Learning Assessment
Continuous Assessment Test(CAT) (40% weight age)
Final Semester Examination
CAT-1 CAT-2 CAT-3 (60%weightage)
Bloom’s Cognitive Level of Thinking
Supporting Supporting Supporting
Test Test
Activity Activity Test (60%) Activity Test (100%)
(60%) (60%)
(40%) (40%) (40%)
CTL1 Remember 20% 10% 20% 10% 20% 10% 30%
CTL 2 Understand 30% 10% 30% 10% 30% 10% 40%
CTL 3 Apply 20% 10% 20% 10% 20% 10% 30%
CTL 4 Analyze
CTL 5 Evaluate -
CTL 6 Create - - - - - - -
Total 100% 100% 100% 100%

Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
[Link] Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 8th Board of Studies Meeting, 2 September 2023

 COMPUTER NETWOKS L T P C
Course Code 231EC522 Course Name Course Category PC
AND SECURITY 3 0 0 3
Pre-requisite Progressive Course Offering Department of Electronics and Communication
Nil
Courses Courses Department Engineering

Course Learning Objectives The objective of learning this course is to:

(CLO):
CLO-1:  To learn the Network Models and data link layer functions.
CLO-2:  To understand routing in the Network Layer
CLO-3:  To explore methods of communication and congestion control by the Transport Layer
CLO-4:  To study the Network Security Mechanisms
CLO-5:  .To learn various hardware security attacks and their countermeasures.

Program
Program Outcome (PO) Specific
outcomes
1 2 3 4 5 6 7 8 9 10 11 12

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course Outcomes
At the end of this course, learners will be able to:
(CO):
CO-1: Explain the Network Models, layers and functions. 3 3 3 2 - - - - - - 1 1 2 1 1
CO-2: Categorize and classify the routing protocols. 3 3 3 2 - - - - - - 1 1 2 1 1
CO-3: List the functions of the transport and application layer. 3 3 3 2 - - - - - - 1 1 2 1 1
CO-4: Evaluate and choose the network security mechanisms. 3 3 3 2 - - - - - - 1 1 2 1 1
Discuss the hardware security attacks and countermeasures.
CO-5: 3 3 3 2 - - - - - - 1 1 2 1 1
Unit-1- NETWORK MODELS AND DATALINK LAYER 9 Hour
Overview of Networks and its Attributes – Network Models – OSI, TCP/IP, Addressing – Introduction to Data link Layer – Error Detection and Correction –
Ethernet(802.3)- Wireless LAN – IEEE 802.11, Bluetooth – Flow and Error Control Protocols – HDLC – PPP
Unit-2- NETWORK LAYER PROTOCOLS 9 Hour
Network Layer – IPv4 Addressing – Network Layer Protocols(IP,ICMP and Mobile IP) Unicast and Multicast Routing – Intra domain and Inter domain Routing
Protocols – IPv6 Addresses – IPv6 – Datagram Format - Transition from IPv4 to IPv6
Unit-3- TRANSPORT AND APPLICATION LAYERS 9 Hour
Transport Layer Protocols – UDP and TCP Connection and State Transition Diagram - Congestion Control and Avoidance (DEC bit, RED)- QoS - Application Layer
Paradigms – Client – Server Programming – Domain Name System – World Wide Web, HTTP, Electronic Mail.

Unit-4- NETWORK SECURITY 9 Hour

OSI Security Architecture – Attacks – Security Services and Mechanisms – Encryption –Advanced Encryption Standard – Public Key Cryptosystems – RSA
Algorithm – Hash Functions – Secure Hash Algorithm – Digital Signature Algorithm.
Unit-5- HARDWARE SECURITY 9 Hour
Introduction to hardware security, Hardware Trojans, Side – Channel Attacks – Physical Attacks and Countermeasures – Design for Security. Introduction to Block
chain Technology.
Total Hours 45

TEXTBOOKS REFERENCE BOOK

1. [Link], Data Communication and

Networking, Fifth Edition, TMH, 2017.(Unit – I,II,III) 1. [Link] and [Link], Computer Networking – A
Learning 2. William Stallings, Cryptography and Network Security, Top – Down Approach, Sixth Edition, Pearson, 2017.
Resources Seventh Edition, Pearson Education, 2017(Unit- IV) 2. Doughlas .[Link], Computer Networks and Internets with
3. Bhunia Swarup, Hardware Security –A Hands On Internet Applications, Fourth Edition, Pearson Education, 2008
Approach,Morgan Kaufmann, First edition, 2018.(Unit – V)
 Learning Assessment
Continuous Assessment Test(CAT) (40% weight age)
Final Semester Examination
CAT-1 CAT-2 CAT-3 (60%weightage)
Bloom’s Cognitive Level of Thinking
Supporting Supporting Supporting
Test Test
Activity Activity Test (60%) Activity Test (100%)
(60%) (60%)
(40%) (40%) (40%)
CTL1 Remember 20% 10% 20% 10% 20% 10% 30%
CTL 2 Understand 30% 10% 30% 10% 30% 10% 40%
CTL 3 Apply 20% 10% 20% 10% 20% 10% 30%
CTL 4 Analyze
CTL 5 Evaluate -
CTL 6 Create - - - - - - -
Total 100% 100% 100% 100%

Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
[Link] Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 8th Board of Studies Meeting, 2 September 2023

 LABORATORY COURSES
(REGULATION 2023)

Digital Signal Processing L T P C

Course Code 231EC52A Course Name Course Category PROFESSIONAL CORE
Laboratory 0 0 2 1
Pre-requisite Progressive Course Offering Department of Electronics and
Nil
Courses Courses Department Communication Engineering

Course Learning Objectives

The objective of learning this course is to:
(CLO):
 To perform basic signal processing operations such as Linear Convolution, Circular Convolution, Auto Correlation, Cross
CLO-1:
Correlation and Frequency analysis in MATLAB
CLO-2:  To implement FIR and IIR filters in MATLAB and DSP Processor
CLO-3:  To study the architecture of DSP processor
CLO-4:  To design a DSP system to demonstrate the Multi-rate and Adaptive signal processing concepts.

Lab Experiments
Lab 7: Study of architecture of Digital Signal Processor
Lab 8: Generation of various signals and random noise using DSP
processor
Lab1: Generation of elementary Discrete-Time sequences Lab 9: Perform DFT using FFT in DSP Processor
Lab2: Linear and Circular convolutions Lab 10: Perform convolution and correlation of two signals using CO3
CO1
Lab3: Auto correlation and Cross Correlation DSP processor
Lab4: Frequency Analysis using DFT Lab 11: Perform IFFT in DSP Processor
Lab 12: Implement impulse response of 1st order system in DSP
Processor

Lab 5: Design of FIR filters (LPF/HPF/BPF/BSF) and

demonstrates the filtering operation CO2
Lab 6: Design of Butterworth and Chebyshev IIR filters
(LPF/HPF/BPF/BSF) and demonstrate the filtering operations
Total Hours 30
 Program Outcomes(PO)
Program Specific
1 2 3 4 5 6 7 8 9 10 11 12 outcomes

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course
At the end of this course ,learners will be able to:
Outcomes(CO):
CO-1: 1. Carryout basic signal processing operations 3 3 3 2 - - - - - - 1 1 2 1 1
2. Demonstrate their abilities towards MATLAB based 3 3 3 2 - - - - - - 1 1 2 1 1
CO-2:
implementation of various DSP systems
3. Design and Implement the FIR and IIR Filters in DSP Processor for
CO-3: performing filtering operation over real-time signals 3 3 3 2 - - - - - - 1 1 2 1 1

CO: 3 3 3 2 - - - - - - 1 1 2 1 1

1. John G. Proakis & Dimitris [Link], ―Digital

1. A. V. Oppenheim, R.W. Schafer and J.R. Buck, ―Discrete-Time Signal
Signal Processing – Principles, Algorithms &
Processing, 8th Indian Reprint, Pearson, 2004.
Applications‖, Fourth Edition, Pearson Education /
Learning 2. Sanjit K. Mitra, ―Digital Signal Processing – A Computer Based
Resources Prentice Hall, 2007.
Approach, Tata McGraw Hill, 2007.
2. Emmanuel C. I feachor& Barrie. W. Jervis, ―Digital
3. Andreas Antoniou, ―Digital Signal Processing‖, Tata McGraw Hill,
Signal Processing, Second Edition, Pearson Education /
2006.
Prentice Hall, 2002.

Learning Assessment

Final Semester Examination

Internal Assessment (60% weight age)
Bloom’s Level of Thinking (40% weightage)

Evaluation of Laboratory
Test (25%) Observation, Record, Test (75%) Viva (25%)
Viva (75%)
Level 1 Remember 20% 10% 20% 10%
Level 2 Understand 20% 10% 20% 10%
Level 3 Apply 10% 5% 10% 5%
Level 4 Analyze 10% 5% 10% 5%
Level 5 Evaluate 10% - 10% -
Level 6 Create - - - -
Total 100% 100%
Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
[Link] Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 8th Board of Studies Meeting, 2 September 2023

 LABORATORY COURSES
(REGULATION 2023)

Microprocessors and L T P C
Course Code 231EC52B Course Name Microcontrollers Course Category PROFESSIONAL CORE
0 0 2 1
Laboratory
Pre-requisite Progressive Course Offering Department of Electronics and
Nil
Courses Courses Department Communication Engineering

Course Learning Objectives

The objective of learning this course is to:
(CLO):
CLO-1:  To Introduce ALP concepts, features and Coding methods
CLO-2:  Write ALP for arithmetic and logical operations in 8086 and8051
CLO-3:  Differentiate Serial and Parallel Interface
CLO-4:  Interface different I/Os with Microprocessors

Lab Experiments
Lab1: Basic arithmetic and Logical operations
Lab 12: Basic arithmetic and Logical operations
Lab2: Decimal arithmetic
Lab 13: Square and Cube program, Find 2‘s complement of a CO3
Lab3: Matrix operations CO1
number
Lab4: Code conversion
Lab 14: Unpacked BCD to ASCII
Lab 5: String manipulations
Lab 6: Sorting and Searching
Lab 7: Traffic light controller
Lab 8: Stepper motor control CO2
Lab 9: Key board and Display
Lab 10: Serial interface and Parallel interface
Lab 11: A/D and D/A interface and Waveform Generation
Total Hours 30
 Program Outcomes(PO)
Program Specific
1 2 3 4 5 6 7 8 9 10 11 12 outcomes

Conduct investigations

Project Management.
of complex problems
Design/development

Modern Tool Usage

Life Long Learning

Individual & Team
Problem Analysis

The engineer and

Communication
Environment &
Sustainability
Engineering

of solutions
Knowledge

& Finance
Effective
society

PSO-1

PSO-2

PSO-3
Ethics

Work
Course
At the end of this course ,learners will be able to:
Outcomes(CO):
1. Implement the ALP Programmes for fixed Point and Arithmetic
CO-1: 3 3 3 2 - - - - - - 1 1 2 1 1
operations
2. Demonstrate the interfacing circuits for different I/Os using 3 3 3 2 - - - - - - 1 1 2 1 1
CO-2:
microprocessor
CO-3: 3. Implement the basic programs in 8051 microcontroller 3 3 3 2 - - - - - - 1 1 2 1 1

CO: 3 3 3 2 - - - - - - 1 1 2 1 1

1. Krishna Kant, ― “Microprocessors and Microcontrollers- Architecture,

1. Muhammad Ali Mazidi, J.G. Mazidi, R.D. programming and system design 8085, 8086, 8051,8096”, Prentice Hall of
McKinlay,”The 8051 Microcontroller and Embedded India, New Delhi, 2007.
Systems”, Second Edition, Prentice Hall of India Pvt. 2. Kenneth J Ayala, ― “The 8051 Microcontroller – Architecture,
Learning Ltd., 2007.
Resources Programming and Applications”, PenramInternational Publications,
2. [Link],[Link], "Advanced Microprocessors Mumbai India, 1996.
and Peripherals" 3rd edition, Tata McGrawHill, 2012 3. Doughlas [Link],”Microprocessors and Interfacing, Programming and
Hardware”, TMH, 2012
 Learning Assessment

Final Semester Examination

Internal Assessment (60% weight age)
Bloom’s Level of Thinking (40% weight age)

Evaluation of Laboratory
Test (25%) Observation, Record, Viva Test (75%) Viva (25%)
(75%)
Level 1 Remember 20% 10% 20% 10%
Level 2 Understand 20% 10% 20% 10%
Level 3 Apply 10% 5% 10% 5%
Level 4 Analyze 10% 5% 10% 5%
Level 5 Evaluate 10% - 10% -
Level 6 Create - - - -
Total 100% 100%

Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts
Dr. Sudeb Dasgupta
Professor,
Department of Electronics and Communication Engg.,
IIT Roorke.
Dr. D. Sriram Kumar
Professor,
[Link]
Department of Electronics and Communication Engg., [Link]/VTMT
Project Manager,
NIT,Tiruchirappalli. [Link]/VTMT
American Megatrends International India Pvt Ltd
Dr. R. Nakkeeran
Professor
Department of Electronics Engineering
School of Engineering and Technology
Pondicherry University

Approval 8th Board of Studies Meeting, 2 September 2023