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COMPUTER ORGANIZATION & ASSEMBLY
LANGUAGE
Courtesy of: Dr. Numan Ali
Assistant Professor in Department of Computer Games
Development, Air University Islamabad
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X86 Processor Architecture
• Level of Memory
• Level 1 or Register: Accumulator, Program counter,
Address Register, etc.
• Level 2 or Cache memory: To faster access.
• Level 3 or Main Memory: Primary memory (RAM
and ROM)
• Level 4 or Secondary Memory: Disk, USB etc
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X86 Processor Architecture
• Cache Memory
• Cache memory is a small, high-speed storage area
in a computer.
• It stores copies of the data from frequently used
main memory locations and to reduce the average
time to access data (speed up).
• It acts as a buffer between RAM and the CPU.
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X86 Processor Architecture
• Cache Hit: If the processor finds that the memory
location is in the cache for data reading.
• Cache Miss: If the processor does not find the
memory location in the cache then cache allocates a
new entry and copies the data form main memory.
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X86 Processor Architecture
• General Concepts
• IA-32 Processor Architecture
• IA-32 Memory Management
• 64-bit Processors
• Components of an IA-32 Microcomputer
• Input-Output System
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X86 Processor Architecture
• IA-32 Bits Processor Architecture
• Modes of operation
• Basic execution environment
• Floating-point unit
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X86 Processor Architecture
• Modes of operation
• x86 processors have three primary modes of
operation:
• protected mode,
• real-address mode, and
• system management mode.
• A sub-mode, named virtual-8086, is a special case
of protected mode.
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X86 Processor Architecture
• Modes of operation
• i. Protected Mode: It is the native state of the
processor (Windows or Linux), in which all
instructions and features are available.
• Programs are given separate memory areas named
segments.
• The processor prevents programs from referencing
memory outside their assigned segments.
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X86 Processor Architecture
• ii. Virtual-8086 Mode: If a program crashes, it will not
affect other programs running at the same time.
• A modern operating system can execute multiple
separate virtual-8086 sessions at the same time.
• Runs 16-bit real-mode code inside a protected
environment.
• Allows legacy DOS applications to run on modern
systems.
• Uses virtual memory and hardware emulation to
protect the system.
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X86 Processor Architecture
• iii. Real-Address Mode: the ability to switch into other
modes and can only address a range of 1 MByte.
• This mode is useful if a program requires direct
access to system memory and hardware devices.
• 1MB memory limit (uses a 20-bit address bus).
• No memory protection (any program can access any
memory location).
• No multitasking support.
• Uses segmentation (CS, DS, SS, ES segment
registers).
• Direct hardware access without restrictions.
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X86 Processor Architecture
• iv. System Management: It provides an operating system
with a mechanism for implementing functions such as:
• power management and system security.
• These functions are usually implemented by computer
manufacturers who customize the processor for a
particular system setup.
• Completely isolated from the OS.
• Used for power-saving features (e.g., ACPI, cooling fan
control).
• Manages BIOS-level operations (e.g., firmware updates).
• Not accessible by normal applications or the OS.
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Memory
Mode Addressing Security Multitasking Used By
Limit
BIOS, MS-
Real Mode 16-bit 1MB No No DOS,
Bootloaders
Modern OS
Protected
32-bit 4GB Yes Yes (Windows,
Mode
Linux)
BIOS,
System
Power
Manageme N/A N/A N/A N/A
Manageme
nt Mode
nt
DOS
Virtual
16-bit 1MB Partial Yes programs in
8086 Mode
modern OS
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X86 Processor Architecture
• Basic Execution Environment
• Address Space
• Protected mode address a range of 4 GByte. address
a range of 1 MByte.
• Real-Address Mode can only address a range of 1
MByte.
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X86 Processor Architecture
• Basic program execution registers
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X86 Processor Architecture
• EFLAG registers
• To control the arithmetic and logical operations in CPU
such as control flags and status flags
• Control Flags: The control flags enable or disable
certain operations of the microprocessor. For
example, arithmetic overflow is detected.
• Status Flags: The status flags reflect the outcomes of
arithmetic and logical operations performed by the
CPU.
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X86 Processor Architecture
• Types of Status Flag
• The Carry flag (CF) is set when the result of an
unsigned arithmetic operation is too large (out of
range) to fit into the destination.
• The Overflow flag (OF) is set when the result of a
signed arithmetic operation is too large or too small to
fit into the destination.
• The Sign flag (SF) is set when the result of an
arithmetic or logical operation generates a negative
result.
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X86 Processor Architecture
• The Zero flag (ZF) is set when the result of an
arithmetic or logical operation generates a result of
zero.
• The Auxiliary Carry flag (AC) In an arithmetic
operation, when the carry is generated from bit D3 to
D4, the auxiliary carry flag is set to 1.
• Parity Flag (PF) - this flag is set to 1 when there is
even number of one bits in result, and to 0 when there
is odd number of one bits.
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X86 Processor Architecture
• Floating-point unit
• A floating point unit is an integrated circuit which
handles all mathematical operations that have
anything to do with floating point numbers or fractions.
• The FPU performs simple mathematical tasks which
include addition, subtraction, division, multiplication
and square root.
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X86 Processor Architecture
• Floating-point unit registers
