Cairo University

Faculty of Computers and Artificial Intelligence

Final Exam (Form A)
Department: Information Technology Date: 20/1/2022
Course Name: Logic Design Duration: 2 hours
Course Code: IT212/CS221 Number of pages: 8
Instructor: Dr. Eman Ahmed and Dr. Dina Tarek Total Marks: 60

‫تعليمات هامة‬
‫• حيازة التليفون المحمول مفتوحا داخل لجنة اﻹمتحان يعتبر حالة غش تستوجب العقاب وإذا كان ضرورى الدخول بالمحمول فيوضع مغلقا‬
.‫فى الحقائب‬
.‫• ﻻ يسمح بدخول سماعة اﻷذن أو البلوتوث‬
.‫• ﻻيسمح بدخول أي كتب أو مﻼزم أو أوراق داخل اللجنة والمخالفة تعتبر حالة غش‬

Only solutions in the bubble sheet will be considered, solution in this

paper or the answer paper won't be considered

Note: None in the answers means that none of the mentioned solutions is right.

A. Using k-map to simplify the following Boolean function as a Sum of Product (SoP):
𝑭(𝑨, 𝑩, 𝑪, 𝑫) = 𝑨𝑩𝑫 + 𝑨𝑩𝑪 + 𝑨𝑩𝑪𝑫 + 𝑨𝑪𝑫 + 𝑩𝑪𝑫 + 𝑨𝑪𝑫 + 𝑨𝑪𝑫 + 𝑩𝑪𝑫 + 𝑨𝑩𝑪𝑫

1. Which of the following is a minterm of F?

a. 1 b. 9 c. 13 d. 15 e. None

2. Which of the following is a maxterm of F?

a. 0 b. 2 c. 10 d. 11 e. None

3. How many terms exit in the simplified SoP function?

a. 1 b. 2 c. 3 d. 4 e. None

4. Which of the following is a term in the simplified SoP function?

a. 𝐂𝐃 b. AB c. D d. 𝐁 e. None

5. Which of the following is a term in the simplified SoP function?

a. 𝐂𝐃 b. 𝐃 c. 𝐀𝐁 d. 𝐀𝐁 e. None

6. How many AND gates are needed to build the simplified SoP function?
a. 0 b. 1 c. 2 d. 3 e. None

7. How many OR gates are needed to build the simplified SoP function?
a. 0 b. 1 c. 2 d. 3 e. None

8. If the propagation delay of NOT, AND, OR gates are 3, 10 and 10 nsec respectively. What is the
propagation delay of the simplified PoS function?
a. 20 nsec b. 23 nsec c. 10 nsec d. 13 nsec e. None

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B. Using the minimum number of half adder(s) and full adder(s), design a combinational circuit
that adds 12 to a 5-bit binary number (A4 A3 A2 A1 A0). Note CP is the carry resulting from
adding previous bit.

9. How many half adders are needed?

a. 0 b. 1 c. 2 d. 3 e. None

10. How many full adders are needed?

a. 0 b. 1 c. 2 d. 3 e. None

11. What are the inputs of the least significant bit if using half adder?
a. A0, 0 b. A0, 1 c. A1, 0 d. A1, 1 e. Do not need a half adder

12. What are the inputs of the second bit (from the right side) if using full adder?
a. A1, 1, CP b. A1, 0, CP c. A2, 1, CP d. A1, 0, CP e. Do not need a half adder

13. What are the inputs of the third bit (from the right side) if using full adder?
a. A2, 1, CP b. A2, 0, CP c. A3, 1, CP d. A3, 1, CP e. Do not need a full adder

14. What are the inputs of the fourth bit (from the right side) if using full adder?
a. A3, 1, CP b. A3, 0,CP c. A4, 1, CP d. A4, 0, CP e. Do not need a full adder

15. What are the inputs of the fifth bit (from the right side) if using half adder?
a. A4, 1 b. A4, 0 c. A4, CP d. A5, CP e. Do not need a half adder

C. Subtracting the two BCD numbers A and B where is A 0111 1000 1001 and B is 0011 0011 0000:
16. What is the 9's complement of the BCD number B?
a. 0110 0110 1000 b. 0011 0010 0000 c. 0110 0011 1001 d. 0110 0110 1001 e. None

17. What is the 10's complement of the BCD number B?

a. 0110 0110 1001 b. 0110 0110 1010 c. 0110 0110 0000 d. 0110 0111 0000 e. None

18. What is the initial result of subtracting A and B?

a. 1111 1111 1001 b. 1101 1111 1010 c. 1101 1111 1001 d. 1101 1110 1000 e. None

19. What is the final result of subtracting A and B?

a. 0010 0101 1000 b. 0010 0101 1001 c. 0010 1001 1000 d. 0100 0101 1001 e. None

D. Using tabular method to simplify the following function as SoP: F(X,Y,Z)=∑m(0,1,6,7)+d(2,4),

then answer the following:

20. How many groups are initially formed?

a. 2 b. 4 c. 6 d. 8 e. None

21. Which of the following numbers form the first group?

a. 0/1 b. 1/2 c. 2/4 d. 4/6 e. None

22. Which of the following numbers form the second group?

a. 1/4/6 b. 2/4/7 c. 1/2/4 d. 6/7 e. None

23. Which of the following combined terms is formed in the first iteration?
a. 0,4 b. 4,7 c. 0,6 d. 1,7 e. None

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24. Which of the following combined terms is formed in the first iteration?
a. 1,6 b. 0,7 c. 4,7 d. 4,6 e. None

25. Which of the following combined terms is formed in the second iteration?
a. 0,2,4,7 b. 1,7,2,6 c. 0,2,4,6 d. 4,7,6,2 e. None

26. Using simple gates (AND, OR, NOT), which of the following is a term in the simplified function?
a. 𝐗𝐙 b. 𝐙 c. 𝐗 𝐘 d. 𝐘𝐙 e. None

27. Which of the following represents the simplified function?

a. XY b. 𝐗𝐘 c. 𝐗𝐙 d. 𝐗𝐘 e. None

E. Design a circuit to pass signal A and C only when B and C are different. Both outputs must be low
when A and C are not being passed.
The following table represents the truth table of this circuit. What is the
Inputs value of the outputs XY in case of the following inputs ABC?
A B C
28. 0 0 0 a. 00 b. 01 c. 10 d. 11 e. None

29. 0 0 1 a. 00 b. 01 c. 10 d. 11 e. None

30. 0 1 0 a. 00 b. 01 c. 10 d. 11 e. None

31. 0 1 1 a. 00 b. 01 c. 10 d. 11 e. None

32. 1 0 0 a. 00 b. 01 c. 10 d. 11 e. None

33. 1 0 1 a. 00 b. 01 c. 10 d. 11 e. None

34. 1 1 0 a. 00 b. 01 c. 10 d. 11 e. None

35. 1 1 1 a. 00 b. 01 c. 10 d. 11 e. None

36. Which of the following is a term in the simplified function X as PoS?

a. A+B b. 𝐁 + 𝐂 c. 𝐁 d. 𝐀 + 𝐁 e. None

37. Which of the following is a term in the simplified function X as PoS?

a. A b. 𝐁 + 𝐂 c. 𝐁 + 𝐂 d. 𝐁 e. None

38. Which of the following is a term in the simplified function Y as PoS?

a. AB b. 𝐁 c. 𝐁 d. 𝐁 + 𝐂 e. None

39. Which of the following is a term in the simplified function Y as PoS?

a. 𝐀 + 𝐁 b. 𝐁 + 𝐂 c. 𝐂 d. 𝐁 + 𝐂 e. None

40. How many terms are there in the simplified function Y as (PoS)?
a. 1 b. 2 c. 3 d. 4 e. None

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F. Answer the following:
41. Which of the following is used as a data selector?
a. Decoder b. Encoder c. Multiplexer d. DeMultiplexer
42. Which of the following can be used for data conversion from decimal to binary?
a. Decoder b. Encoder c. Multiplexer d. DeMultiplexer

43. Which of the following can be used to convert from binary to decimal?
a. Decoder b. Encoder c. Multiplexer d. DeMultiplexer

G. To design a 4x2 priority encoder such that the higher priority is given to the lowest order bit,
where will be the don’t care values? (Choose all the choices that match the correct answer)

D3 D2 D1 D0 X Y
44. 0 0 a. D3 b. D2 c. D1 d. D0 e. None
45. 0 1 a. D3 b. D2 c. D1 d. D0 e. None
46. 1 0 a. D3 b. D2 c. D1 d. D0 e. None
47. 1 1 a. D3 b. D2 c. D1 d. D0 e. None

H. For the following logic diagram:

48. What function does it represent?

𝐶 0
1 4x1 𝐹
𝐶̅ 2 MUX
3

A B
a. A XNOR B b. A XOR B c. A XOR C d. B XNOR C e. None

I. To implement AND(X,Y) gate using 2x1 MUX:

49. What is wrong with this figure?

a) None
Y 0 2x1 MUX b) X should be at pin 0 and value 0 at pin 1
𝐹
0 1 c) Value 0 should be at pin 0 and Y at pin 1
d) Y should be at pin 0 and value 1 at pin 1

J. Regarding the Racing problem of latches:

50. What can be the solution of the Racing problem? (Select all the correct choices)
a. Level-triggering b. Edge-triggering c. Master-slave flip flop d. All

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K. On using T flip flop:
51. What is the next state when T = 0?
a. Q(t+1) = Q(t) b. Q(t+1) = 0 c. Q(t+1) = 1 d. Q(t+1) = 𝑸(𝒕)

52. What is the next state when T = 1?

a. Q(t+1) = Q(t) b. Q(t+1) = 0 c. Q(t+1) = 1 d. Q(t+1) = 𝑸(𝒕)

L. For master-slave D flip flop:

53. Which latch is working when clock = 0?
a. Master b. Slave c. None d. Both Master and Slave

M. For the following master-slave D flip flop timing diagram:

P0 P1 P2 P3 P4 P5 P6 P7
clk

54. What will be the value of Q(Master) in P1?

a. 0,0 b. 0,1 c. 1,0 d. 1,1

55. What will be the value of Q(Master) in P2?

a. 0,0 b. 0,1 c. 1,0 d. 1,1

56. What will be the value of Q(Master) in P3?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

57. What will be the value of Q(Master) in P4?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

58. What will be the value of Q(Slave) in P1?

a. 0,0 b. 0,1 c. 1,0 d. 1,1

59. What will be the value of Q(Slave) in P2?

a. 0,0 b. 0,1 c. 1,0 d. 1,1

60. What will be the value of Q(Slave) in P3?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

61. What will be the value of Q(Slave) in P4?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

N. If Q(pos) represents the state calculated at positive edge triggering, answer the following:
62. What will be the value of Q(pos) at P1?
a. 0,0 b. 0,1 c. 1,0 d. 1,1

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63. What will be the value of Q(pos) at P2?
a. 0,0 b. 0,1 c. 1,0 d. 1,1

64. What will be the value of Q(pos) at P3?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

65. What will be the value of Q(pos) at P4?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

O. If Q(neg) represents the state calculated at negative edge triggering, answer the following:
66. What will be the value of Q(neg) at P1?
a. 0,0 b. 0,1 c. 1,0 d. 1,1

67. What will be the value of Q(neg) at P2?

a. 0,0 b. 0,1 c. 1,0 d. 1,1

68. What will be the value of Q(neg) at P3?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

69. What will be the value of Q(neg) at P4?

a. 0,0,0 b. 0,1,0 c. 1,0,1 d. 1,1,1

70. From the above results, which of the following is equal to Q(slave)?
a. Q(Master) b. Q(pos) c. Q(neg) d. None

P. For the following state diagram of a sequential circuit with an input X, one JK flip flop A and one
D flip flop B and an output Y.

71. What is the next state for a present state 00 & an input of 1?
a. 00 b. 01 c. 10 d. 11 e. None

72. What is the next state for a present state 01 & an input of 1?
a. 00 b. 01 c. 10 d. 11 e. None

73. What is the next state for a present state 10 & an input of 0?
a. 00 b. 01 c. 10 d. 11 e. None

74. What is the next state for a present state 11 & an input of 1?
a. 00 b. 01 c. 10 d. 11 e. None

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 Present

Input
This table represents a part of the state table of this circuit. What is the
State
value of JA KA – DB for each of the following stated present states – input?
A B X
75. 0 0 0 a. 0 X – 0 b. 0 X – 1 c. 1 X – 0 d. 1 X – 1 e. None

76. 0 0 1 a. 0 X – 0 b. 0 X – 1 c. 1 X – 0 d. 1 X – 1 e. None

77. 0 1 0 a. X 0 – 0 b. X 0 – 1 c. X 1 – 0 d. X 1 – 1 e. None

78. 0 1 1 a. X 0 – 0 b. X 0 – 1 c. X 1 – 0 d. X 1 – 1 e. None

79. 1 0 0 a. X 0 – 0 b. X 0 – 1 c. X 1 – 0 d. X 1 – 1 e. None

80. 1 0 1 a. X 0 – 0 b. X 0 – 1 c. X 1 – 0 d. X 1 – 1 e. None

81. For this circuit, what is the simplified state equation of JA?
a. 𝐁𝐗 b. 𝐁𝐗 c. ABX d. 𝐀𝐁𝐗 e. None

82. For this circuit, what is the simplified state equation of KA?
a. 𝐁 + 𝐗 b. 𝐁 + 𝐗 c. 𝐀𝐁 + 𝐀𝐗 d. 𝐀𝐁 + 𝐁𝐗 e. None

83. For this circuit, what is the simplified state equation of DB?
a. 𝐁𝐗 b. 𝐁𝐗 c. X d. 𝐗 e. None

84. For this circuit, what is the simplified state equation of Y?

a. 𝐀𝐁 𝐗 b. 𝐀𝐗 c. 𝐀𝐁 d. 𝐀𝐁𝐗 e. None

85. What is the type of the state diagram?

a. Mealy b. Moore c. Both d. Cyclic e. None

Q. For the following state table, reduce the number of states, always start with the states in the
upper rows, and in case of matching always keep the state in the upper rows.

86. What is the removed state after the first reduction?

Present Next State Output
a. B b. C c. D d. E e. None State X=0 X=1 X=0 X=1
A F B 0 1
87. What is the removed state after the second reduction?
B D C 0 0
a. B b. C c. D d. E e. None
C A E 0 0
88. What is the removed state after the third reduction? D A B 0 0
a. B b. C c. D d. E e. None E D C 0 0
F F B 0 1
89. What is the removed state after the fourth reduction?
a. B b. C c. D d. E e. None

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90. What is the number of flip flops needed to build the circuit before  after the reduction?
a. 33 b. 43 c. 32 d. 44 e. None

R. The shown sequential circuit has 2 inputs X and Y, one T- flip flop whose state is A and an output
Z.

A
X T Z
Y

91. How many present states are there in the state table?
a. 1 b. 2 c. 3 d. 4 e. None

92. How many inputs to the circuit are there in the state table?
a. 1 b. 2 c. 3 d. 4 e. None

93. How many outputs are there in the state table?

a. 1 b. 2 c. 3 d. 4 e. None

94. How many rows are there in the 1D state table ?

a. 1 b. 2 c. 3 d. 4 e. None

95. How many rows are there in the 2D state table?

a. 1 b. 2 c. 3 d. 4 e. None

96. What is the input state equation of TA?

a. 𝑨 b. 𝑿 ⊕ 𝒀 c. 𝑿𝒀 d. 𝑿 ⊙ 𝒀 e. None

97. What is the output state equation?

a. 𝑨 b. 𝑿 ⊕ 𝒀 c. 𝑿𝒀 d. 𝑿 ⊙ 𝒀 e. None

98. How many bits are required to represent the states ?

a. 1 b. 2 c. 3 d. 4 e. None

99. What is the type of this circuit?

a. Mealy b. Moore c. Both Mealy and d. Cyclic e. None
Moore

100. What is the next state in the first row of the 1D state table?
a. 0 b. 1 c. 00 d. 11 e. None

Good Luck
Dr. Eman Ahmed & Dr. Dina Tarek

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