Introduction-Microprocessor

MICROPROCESSORS
CHAPTER: 01
INTRODUCTION
*This materail is not sufficient for your examination, please read books and other materials also.

SYLLABUS

OLD QUESTIONS

1.1 INTRODUCTION AND HISTORY OF MICROPROCESSORS

A Microprocessor is a multipurpose programmable, clock driven, register based electronic
device that reads binary instructions from a storage device called memory, accepts binary
data as input, processes data according to those instructions and provide results as out-
put.
Fairchild semiconductors (founded in 1957) invented the first Integrated Circuit in 1959
that marked the microprocessor history. In 1968, Gordan Moore, Robert Noyce and
Andrew Grove resigned from the Fair child semiconductors and started their own com-
pany: Integrated Electronics (Intel). In 1971, the first microprocessor Intel 4004 was
invented. A microprocessor is also known as a central processing unit in which numbers
of peripherals’ are fabricated on a single chip. It has ALU (arithmetic and logic unit), a
control unit, registers, bus systems and a clock to perform computational tasks.

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION

1.2 BASIC BLOCK DIAGRAM OF COMPUTER

aMemory Unit stores binary information such as

instructions and data (Eg. RAM, ROM)

aALU perform arithmetic &logical operations.

aCU coordinates all activities of processor.
(The control unit decides what the instructions
mean and generates necessary timing and
control signals)
aInput/Output Device: communicates with the
outside world. (Eg. Keyboard, Mouse, Monitor,

*You can explain yourself

1.3 ORGANIZATION OF MICROPROCESSOR BASED SYSTEM

aRegister Array holds intermediate data
I/O PORTS during the execution of a program and are
accessible to the user through instruction.

REGISTER
ALU ARRAY System Bus aSystem Bus: communication path between
the microprocessor and peripherals.

Memory
ROM, R/W M aMemory: (ROM): BIOS, Monitor Program.
Read/Write Memory (RAM): used
CONTROL
to store user programs and data.

*Other components same as above.

*Please Read diffrence between Microprocessor and Microcontroller from class note

1.4 BUS ORGANIZATION

BUS: It is a communication path between the microprocessor and peripherals; it is nothing
but a group of wires to carry bits.. *[SYSTEM BUS= DATA+ADDRESS+CONTROL BUS]

aCommon Bus: System modules

uses same bus. (*Multiplexed)

aData Bus: It’s a path for moving

data.

aAddress Bus: It’s a path for mov-

ing address.

. aControl Bus: Transmits both

command and timing signals.
(R/W, clock, reset, interrupt re-
quest etc..)

*Notice the types of bus (Asked in exam many times)

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION

1.5 STORED PROGRAM CONCEPT AND VON NEUMANN MACHINE

STORED PROGRAM CONCEPT: The stored program concept relates to program instructions be-
ing stored in main memory (RAM). Designed by Hungarian mathematician John Von Neumann.

DATA BUS
aStored Program Concept: program can
be represented in a form suitable for stor-
ADDRESS INSTRUCTIONS
ing in memory alongside with the data.

MAIN MEMORY
ADDRESS BUS

2000H ADD

2001H DATA 1 aprogram can be set or altered by set-

MICROPROCESSOR 2002H DATA 2 ting the values of a portion of memory
ADDRESS MEMORY location.
DECODER CONTROL

CONTROL BUS

VON NEUMANN ARCHITECTURES: In von Neumann architecture, instructions and data are stored
together in the same memory..

aThe Von–Neumann architecture: is the

fundamental basis for the architecture of
modern digital computers.

aControl Unit is simplified, cheaper and

faster.

aFlexibility in memory organization

aDis-adv: Parallel implementation of

program is not allowed.

HARVARD ARCHITECTURE: Harvard architecture uses two separate memories, one for instruc-
tions and another for data.
aHarvard architectures: computers
have separate memory areas for program
instructions and data.

aSimultaneous access to both instruc-

tions and data. (Greater or equel than two
system bus)

aHigh speed execution

aDis-adv: more hardware complexity.

Uses: aEmbedded-systems a(DSP) aReal-time Applications

*Point out the differences and advantage/disadvantage of both.

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION

1.6 PROCESSING CYCLE OF A STORED PROGRAM COMPUTER

The processing cycle is the series of steps involved with the execution of a single
instruction. This can vary, especially with newer machines, but a common case is as
follows:
aFetch Instruction from Memory
aDecode instruction
aEvaluate Operand address(es)
aFetch Operands (into registers)
aExecute instruction
aStore the output of the execution (into registers or memory)
*Note that not all instructions have all phases

*Read individually in details (Asked in exam many times)

1.7 MICROINSTRUCTIONS & HARDWIRED/MICROPROGRAMMED CONTROL UNIT

MICRO-OPERATIONS: Each instruction is executed during an instruction cycle made up of

shorter sub-cycles (example – fetch, indirect, execute, interrupt). The performance of each
sub-cycle involves one or more shorter operations caled micro-operations.

aBus and Memory Transfers

aArithmetical Microoperation
aLogical Microoperation

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION
MICRO-INSTRUCTIONS: (Control word in control Memory) The instruction store in control
memory is called microinstruction (specifies one or more microoperations).
q The lower instruction level patterns which are the numerous sequences for a single
instruction are known as microinstructions.

CONTROL UNIT: The

control unit decides
what the instructions
mean and directs the
necessary data to be
moved from memory to
ALU. It coordinates all
activities of processor
unit, peripheral devices
and storage devices.
Two types of control
unit can be implement-
ed in computing sys-
tems.

Micro instructions are

the instructions stored in
control memory where
as micro operations are
the atomic operations
which executes a
particular micro
instruction.

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION

1. HARDWIRED CONTROL UNIT: Control signals are generated using combinatorial circuit
(dedicated circuit). It’s i/p logic signals are transformed into set of o/p logic signals which
are control signals.

MEMORY INSTRUCTION CODE aFaster.

aDifficult to modify.
aMore costlier.
aRISC
COMBITIONAL
SEQUENCE COUNTER control signals.
LOGIC CIRCUIT

2. MICRO-PROGRAMMED CONTROL UNIT : In micro-programmed control unit, the control

information is stored in control memory. It uses sequences of instructions to perform con-
trol operations performed by micro operations.

INSTRUCTION *Opposite of above

MEMORY CODE
aCISC
control signals.

NEXT
ADDRESS CONTROL DECODING
CAR CDR
GENERATOR MEMORY CIRCUIT

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 Introduction-Microprocessor

CHAPTER: 01
INTRODUCTION

1.8 INTRODUCTION OF REGISTER TRANSFER LANGUAGE

The symbolic notation used to describe the micro operation transfers among register is called register trans-

fer language. It is one of the forms of hardware description language (HDL).

aDescribes the internal organization of digital computers in concise and precise manner.
a Intermediate representation that is very close to assembly language
a Describes data flow at the register-transfer level of an architecture.

FETCH – REGISTERS
aMemory Address Register (MAR)
– Connected to address bus
– Specifies address for read or write op

aMemory Buffer Register (MBR)

– Connected to data bus
– Holds data to write or last data read

aProgram Counter (PC)

– Holds address of next instruction to be fetched

aInstruction Register (IR)

– Holds last instruction fetched

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1. MOV Rd, Rs

Opcode Fetch Cycle

T1 : MAR  PC

MOV Rd, Rs
T2 : MBR  [MAR]

RTL of
T3 : IR  MBR, PCPC+1
T4 : Unspecified

2. MVI R, 8-bit Data

Memory Opcode Fetch
T1 : MAR  PC
T2 : MBR  [MAR]
Cycle
MVI R, 8-bit Data

T3 : IR  MBR, PCPC+1
T4 : Unspecified
RTL of

Read Cycle

T5 : MAR  PC
T6 : MBR  [MAR]
T7 : R  MBR, PC PC + 1

3. MOV R, M

T1 : MAR  PC
Opcode Fetch

T2 : MBR  [MAR]
Cycle
RTL of MOV R, M

T3 : IR  MBR, PCPC + 1,
T4 : Unspecified
Memory Read

T5 : MAR HL
Cycle

T6 : MBR  [MAR]
T7 : R  MBR
4. MVI M, 8-bit Data

Memory Opcode Fetch

T1 : MAR  PC
T2 : MBR  [MAR]

cycle
T3 : IR  MBR, PCPC+1
T4 : Unspecified

MVI M, 8-bit Data

Read cycle
T5 : MAR  PC
RTL of T6 : MBR  [MAR]
T7 : Z  MBR, PC PC + 1

T8 :
MAR HL
Write cycle
Memory
T9 :
MBR Z
T10
[MAR]  MBR
:

5. LXI RP, 16-bit Data

T1 : MAR  PC
Fetch cycle
Opcode

T2 : MBR  [MAR]
T3 : IR  MBR, PCPC + 1
RTL of LXI D, 16-bit Data

T4 : Unspecified
Read cycle

T5 : MAR  PC
Memory

T6 : MBR  [MAR]
T7 : RPL  MBR, PC PC + 1
Read cycle

T8 : MAR  PC
Memory

T9 : MBR  [MAR]
T10 : RPH  MBR, PC PC + 1
6. LDA 16-bit Address

T1 : MAR  PC

Opcode Fetch
T2 : MBR  [MAR]

cycle
T3 : IR  MBR, PCPC + 1
T4 : Unspecified

Memory read cycle

T5 : MAR  PC

T6 : MBR  [MAR]
RTL of LDA 16-bit Address

T7 : Z  MBR, PC PC + 1
Memory Read cycle

T8 : MAR  PC

T9 : MBR  [MAR]

T10 : W  MBR, PC PC + 1

Memory Read cycle

T11 : MAR  WZ

T12 : MBR  [MAR]

T13 : A  MBR