SEQUENTIAL CIRCUITS
ADE-08
By dundatti karunaker reddi
Agenda
2
◻ Review of last class
� ADE -07
◻ Classification of logic circuits
◻ Sequential circuits
� Logical diagram of sequential circuit
� Types of sequential circuits
◻ Flip flop
� Logical symbol of a general Flip flop
� Creation of memory elements(flip flops)
� Basic flip flop with NOR gates
� Types of Flip flops
◻ Self test
◻ Topics to be covered in the next class
◻ Conclusion and References.
[Link] reddy , JNTUHCEH
LOGIC CIRCUITS
Logic circuits are classified into two groups:
Combinational logic circuits Logic gates make decisions
Basic building
blocks include:
Sequential logic circuits Flip Flops have memory
Basic building blocks
include FLIP-FLOPS:
Sequential circuits
◻ In a combinational circuit the output at any instant
of time is dependent only on the present inputs.
◻ In a sequential circuit the output at any instant of
time is dependent not only on the present inputs but
also on the past outputs.
◻ Sequential circuit=(combinational circuit)+
(Memory)
Logical diagram of sequential circuit
◻Inp ◻Outpu
uts ◻Combinational ts
circuit
◻Memory
element
Types of sequential circuits
Synchronous sequential circuits Asynchronous sequential circuits
◻ Memory elements are ◻ Memory elements are
clocked FF’s either un clocked FF’s
◻ A synchronous or time delay elements.
sequential circuit ◻ An Asynchronous
changes their states and sequential circuit
output values at fixed changes their states and
points of time ,which output values whenever
are specified by the a change in input values
rising and/or falling occurs.
edge of a clock signal.
Flip flop
What is a Memory element?
The memory element is a device capable of storing
one bit binary information(either 0 or 1).
Examples: Flip flops , Latches.
A FF is a basic memory element used to store one
bit of information(Either 0 or 1).The name FF is
because this circuit shifts back and forth between
its two stable states upon application of proper
inputs.
Logical symbol of a general Flip flop
INPUTS
FLIP FLOP OUTPUTS
Q
Flip flops(conti…)
◻ As a FF has two stable states , it is called a Bistable
Multivibrator .
◻ As a FF stores one bit binary information ,it is called a
Binary or one-bit Memory.
◻ A flip flop can have one or more inputs and two outputs
namely Q and Q.
◻ When Q=1, FF is said to be in High state or 1state or
SET state.
◻ When Q=0, FF is said to be in Low state or 0 state or
RESET state or CLEAR state.
Creation of memory elements
◻ Any device or circuit that has 2 stable states is said to
be bistable . EX:-
� (1) A toggle switch(as shown in fig) has 2 stable
states(Either up or down,eiher on or off)-So the switch is
also said to have memory since it will remain as set until
some one changes its position.(physical example)
� (2)A flip flop (as shown in fig )has 2 stable states(either 0
or +5 Vdc,either logic 0 or logic 1)-So the FF is also has
memory since its output will remain as set until some
thing is done to change it .(logical example)
◻ NOTE:- Any bistable device can be used to store one
binary digit(bit)-logic 0 or logic 1
Creation of memory elements (conti..)
◻ Construction of FF’s:-
� We can create memory with the boolean gates.
� If you arrange the gates correctly, they will remember an
input value . This simple concept is the basis of RAM
(random access memory) in computers, and also makes it
possible to create a wide variety of other useful circuits .
� Memory relies on a concept called feedback. If you follow
the feedback path, you can see that if Q happens to be 1, it
will always be 1. If it happens to be 0, it will always be 0.
One of the easiest way to construct a FF is to connect 2
inverters in series with a feed back line (as shown in fig).
�
Creation of memory elements (conti..)
� If V1 is 0 Vdc,V3 will also be 0Vdc ( as shown in
fig).The feedback line can again be used to hold V1 at
0 Vdc since V3 is also at 0 Vdc
� If V1 is 5 Vdc,V3 will also be 5 Vdc ( as shown in
fig).The feedback line can again be used to hold V1 at
5 Vdc since V3 is also at 5 Vdc
Basic flip flop with NOR gates
Types of Flip flops
◻ How the o/p of a Flip flop change???
SOL:- 3 different ways
•(1)FF without Clock/Enable signal
•(2)FF with Enable signal(Gated latches)
Level triggering
Positive level Triggering
Negative Level Triggering
•(3)FF with Clock signal
Edge/pulse triggering
Positive edge
*Single positive edge
*Dual positive edge & so on.
Negative edge
Triggering :-The state of a latch or FF is switched by a change in the control input . This
momentary change is called a trigger.
TRIGGERING OF FLIP-FLOPS
• Level-triggering is the transfer of data from input to output of
a flip-flop at anytime the clock pulse is in proper voltage
level.
• Edge-triggering is the transfer of data from input to output
of a flip-flop on the rising edge (L-to-H) or falling edge (H-
to-L) of the clock pulse. Edge triggering may be either
positive-edge (L-to-H) or negative-edge (H-to-L).
NGT-Negative Going Transition
PGT-Positive Going Transition
Negative-edge triggering
Positive-edge triggering
L
time
Level triggering
Flip flops contd…
◻ FLIP
FLIP FLOP FLOP◻ Q
◻
Q ENAB
LE
◻ Q
Q
◻
FLIP FLOP
Q
CLK/ENAB
LE
Q
FF with Clock signal
Positive Negative
Pulse Pulse
Positiv Negativ Negativ Positiv
e e e e
Edge Edge Edge Edge
FF with enable/ clock signal
◻ Signal showing level and edge.
Latch vs Flip flop
Latch Flip flop
◻ An un clocked Flip flop is ◻ In a Flip flop(with clock),
called latch. In this the the output responds to the
output is "latch on“ to 1 or inputs and latch on to "1" or
0 , immediately upon "0" only when the signal is
receiving the inputs. enabled (High).If the signal
◻ This is also called is disabled(Low), the output
Asynchronous Sequential does not respond to the
circuit input.
◻ Latches are controlled by ◻ This is also called
enable signal , and they are Synchronous Sequential
level triggered circuit.
◻ FF’s are edge/pulse triggered
Types of Flip flops
❖ S-R Flip flop
🡪S-R Latch(using NAND and NOR gates), S-R FF with
enable input(gated SR latch), S-R Flip flop with clock ,
Master and slave(pulse-triggered) S-R FF
❖ D Flip flop(with clock)
❖ J-K Flip flop(i. enable input ii. clock)
❖ T Flip flop(with clock)
❖ For each FF we have to derive
� Logical diagrams & internal circuit diagrams .
� Truth table.
� Excitation table.
� Characteristic table.
� Characteristic equation.
� Wave forms.
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D SR
FF FF
FF
JK
T FF FF
D karunakarreddy , JNTUHCEH ,Hyd.
S-R latch(using NAND and NOR)
S
1 Q
(set)
2 Q
’’
R
(reset
)
Points to remember about NOR and
NAND gates
◻ Nor gate:
� Any input is 1 output is 0 .
� Any input is 0 output is complement of other input.
◻ NAND gate:-
� Any input is 0 output is 1
� Any input is 1 output is complement of other input.
Truth table
S R Q(present Q(Next)
STATE
) or Qn or Qn+1 S R Qn+1 STA
TE
0 0 0 0 No change /Hold/Storage
state
0 0 1 1 No change/Hold/Storage 0 0 Qn HOL
state D
0 1 0 0 Reset
0 1 0 RES
0 1 1 0 Reset ET
1 0 0 1 Set
1 0 1 1 Set 1 0 1 SET
1 1 0 X Undefined/Invalid/in
determined/Restricted
combination 1 1 ? INV
1 1 1 X Undefined/Invalid/in ALI
determined/Restricted D
combination
R-S latch(using
NAND)
Symbols: Set Normal
S Q
FF
R Q
Reset Comple-
mentary
Truth Table:
Mode of Operation Inputs Outputs
S R Qn+1 Q’n+1
Prohibited 0 0 1 1
Set 0 1 1 0
Reset 1 0 0 1
Hold 1 1 Qn Q’n
NOTE: Active-LOW inputs
TEST
Memory
1. Logic gates make decisions, flip flops have ____________________?
2. One flip flop can store how many bits? 1
3. What are the two outputs of a flip flop? Q Q-NOT
4. When referring to the state of a flip flop, we’re referring to the state
of which output?
Q
5. What does it mean to SET a flip flop?
Q=1
6. What does it mean to RESET a flip flop?
Q=0
TEST
What is the mode of operation of the R-S flip-flop (set, reset or hold)?
What is the output at Q from the R-S flip-flop (active LOW inputs)?
L
? High
H
Mode of operation = ? Set
H
? High
H
Mode of operation = ? Hold
H
? Low
L
Mode of operation = ? Reset
TEST
◻ Consider the following circuit:
What does it do? R S Function
R 1 0 Reset
Q
0 1 Set
1 1 Hold
◻ What does it do? 0 0 1/1
Q
S ’
It holds a single bit of memory.
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Next class….
🡪Types of flip flops continuation.
SR,
D,
JK,
T FFS
Conti……
General information about memory
◻ A flip-flop holds a single bit of memory
� The bit “flip-flops” between the two NAND gates
◻ In reality, flip-flops are a bit more complicated
� Have 5 (or so) logic gates (transistors) per flip-flop
◻ Consider a 1 Gb memory chip
� 1 Gb = 8,589,934,592 bits of memory
� That’s about 43 million transistors!
◻ In reality, those transistors are split into 9 ICs of about
5 million transistors each
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