Lecture # 7

Comparator/Mux-Demux/Designing through mux/Integration of Functions

By: Muhammad Zain Uddin

email: [email protected]

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Digital Logic Design

Muhammad Zain Uddin

Lecturer,
IBA
Review of previous lecture
Cascading of functions
Adder (Half, Full, Parallel)
Athematic using adder function
Subtractor (Half Full)
Adder Subtractor
Comparator (Con.t)

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Comparators
The function of a comparator is to compare the magnitudes of two
binary numbers to determine the relationship between them. In the
simplest form, a comparator can test for equality using XNOR gates.
How could you test two 4-bit numbers for equality?

AND the outputs of four XNOR gates.

A1
B1
A2
B2 Output
A3
B3
A4
B4
Comparators
IC comparators provide outputs to indicate which of the numbers is
larger or if they are equal. The bits are numbered starting at 0, rather
than 1 as in the case of adders. Cascading inputs are provided to
expand the comparator to larger numbers.

COMP
A0 0
A1 A
A2
A3 3
Cascading A>B A>B
A=B A=B Outputs
inputs
A<B A<B
B0 0
B1 A
The IC shown is the
B2
B3 3 4-bit 74LS85.
Comparators
IC comparators can be expanded using the cascading inputs as
shown. The lowest order comparator has a HIGH on the A = B input.
LSBs MSBs

A0 COMP A4 COMP
A1 0 A5 0
A2 A A6 A
A3 A7
3 3
A>B A>B A>B A>B
+5.0 V A=B A=B A=B A=B Outputs
A<B A<B A<B A<B
B0 0 B4 0
B1 A B5 A
B2 B6
B3 3 B7 3
 Multiplexer (Data Selectors)
The term Multiplexer means many into one.
Multiplexing is the process of transmitting a large number of information over a single
line.
A Digital Multiplexer (MUX) is a combinational Circuit that select one digital
information from several sources and transmits the selected information on a single
output line.
A Multiplexer is also called a Data Selector.
The Multiplexer has several data input line and a single output line.
Mux (Con.t)
MUX directs one of the inputs to its output line by using a control bit word
(selection line) to its select lines.
 Multiplexer contains the followings:
 data inputs
 selection inputs
 a single output
 Selection input determines the input that should be connected to the output.
The multiplexer acts like an electronic switch that selects one from different.
8-1 Multiplexer Circuit
 De-Multiplexer
The De-Multiplexer is a combinational logic circuit that performs
the reverse operation of multiplexer (Several output lines, one input
line).
De -Multiplexer means one to many. A De-Multiplexer is a circuit
with one input and many output. By applying control signal, we can
steer any input to the output. Few types of De -Multiplexer are 1-to 2,
1-to-4, 1-to-8 and 1-to 16 De -Multiplexer .
De-Multiplexer is the process of taking information from one input
and transmitting the same over one of several outputs.
 Switching-network logic blocks
Multiplexer (MUX)
◦ Routes one of many inputs to a single output
◦ Also called a selector

Demultiplexer (DEMUX)
◦ Routes a single input to one of many outputs
◦ Also called a decoder
multiplexer demultiplexer
We construct these
devices from:
• logic gates
• networks of tran-
sistor switches
control control
The “WHY” slide
Multiplexers/Demultiplexers
◦ If you had the ability to select which input to operate, the same part of a circuit can be
used multiple times. So if you have a lot of inputs and all of them are supposed to go
through same complex logic functions, you can save a lot of space on your circuit board
by using a multiplexer.
◦ Then you will also need a demultiplexer to decode the output coming out in serial into
separate output ports.
“WHY”: Sharing complex logic
functions
Share an adder: Select inputs; route sum
A0 A1 B0 B1

Sa MUX MUX Sb multiple inputs

A B
single adder
Sum

Ss DEMUX multiple output destinations

Z0 Z1
Multiplexers (con't)
2:1 mux:Z = S'In0 + SIn1
4:1 mux:Z = S0'S1'In0 + S0'S1In1 + S0S1'In2 + S0S1In3
8:1 mux:Z = S0'S1'S2'In0 + S0'S1S2In1 + ...

I0 2:1 I0 I0
I1 mux Z I1 4:1 I1
I2 mux Z I2
I3 I3 8:1
S0 I4 Z
mux
I5
S0 S1 I6
I7

S0 S1 S2
Cascading multiplexers
Can form large multiplexers from smaller ones
◦ Many implementation options
8:1 mux 8:1 mux
I0 I0 2:1
I1 4:1 I1 mux
I2 mux
I3 I2 2:1
2:1 Z I3
mux mux 4:1
I4 mux Z
I5 4:1 I4 2:1
I6 mux I5 mux
I7
I6 2:1
I7 mux
S0 S1 S2
S0 S1 S2
Multiplexers as general-purpose
logic
A 2n:1 mux can implement any function of n variables
◦ A lookup table
◦ A 2n – 1:1 mux also can implement any function of n variables

Example: F(A,B,C) = m0 + m2 + m6 + m7 = A'B'C' + A'BC' + ABC' + ABC

= A'B'(C') + A'B(C') + AB()

A B C F 1 0
0 0 0 1 C' 0 1
0 0 1 0 1 2 C' 0
0 1 0 1 C' 0 3 F C' 1 F
0 1 1 0 8:1 MUX
0 4 0 2 4:1 MUX
1 0 0 0 0 0 5 1 3
1 0 1 0 1 6 S1 S0
1 1 0 1 1 1 7
1 1 1 1 S2 S1 S0 A B

A B C
Multiplexers as general-purpose
logic

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Multiplexers as general-purpose
logic

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Multiplexers as general-purpose
logic

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