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Compiler Back End Optimization Guide

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Nikhil Ashok
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0% found this document useful (0 votes)
29 views15 pages

Compiler Back End Optimization Guide

Uploaded by

Nikhil Ashok
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Compiler Construction

1
The Back End

2
Back End

• The back end of the compiler translates IR into target


machine code.
• It chooses machine (assembly) instructions to implement
each IR operation.
• The back end ensure conformance with system interfaces.
• It decides which values to keep in registers in order to
avoid memory access; memory access is far slower than
register access.

3
Instruction Selection

• The back end is responsible for instruction selection so as


to produce fast and compact code.
• Modern processors have a rich instruction set. The back
end takes advantage of target features such as addressing
modes.
• The back end takes Intermediate Representation as input
and converts (maps) it into target machine’s instruction set.
• One representation can have many ways (instructions) to
convert it, so it becomes the responsibility of the back end
to choose the appropriate instructions wisely.

4
Instruction Selection

• CISC architecture provided a rich set of instructions and


addressing modes but it made the job of the compiler
harder when it came to generate efficient machine code.
• The RISC architecture simplified this problem.

CISC Features
• Rich Instruction Set (some simple , some very complex)..
• Complex addressing modes :
Orthogonal addressing ( Every possible addressing mode
for every instruction)
• Many instructions take multiple cycles. ( Large variation
in CPI) 5
Instruction Selection

• Instructions are of variable sizes.


• Small number of registers.
• No (or inefficient ) pipelining.

• RISC Features
• Small number of instructions
• Small number of addressing modes.
• Large number of registers. ( >32)
• Instructions execute in one or two clock cycles.

6
• Uniformed length instructions and fixed instruction
format.
• Register/Register Architecture :
Separate memory transfer instructions ( LOAD / STORE )
• Separate instruction/data cache.
• Instruction Pipelining.

7
Register Allocation

• Registers in a CPU play an important role for providing high


speed access to operands.
• Memory access is an order of magnitude slower than register
access.
• The back end attempts to have each operand value in a register
when it is used.
• The number of registers is small and some registers are pre-
allocated for specialized use .
• e.g., program counter, and thus are not available for use to the
back end.
• Back end decides what values to keep in the registers.
• It also decides the registers to be used to keep these values.
8
Instruction Scheduling

• The back end decides the order in which the instruction


will be executed.
• It creates schedules for instructions to execute them.

9
Three Pass Compiler

• Most modern compilers contain three stages.


• An intermediate stage is used for code improvement or
optimization.
• The structure of a three-pass compiler is shown in the
following figure:

10
Three Pass Compiler

• The middle end analyzes IR and rewrites (or transforms) IR.


• Its primary goal is to reduce running time of the compiled
code.
• This may also improve space usage, power consumption,
etc. The middle end is generally termed the “Optimizer”.
• Modern optimizers are structured as a series of passes:

11
Three Pass Compiler

Typical transformations performed by the optimizer are:


• Discover & propagate some constant value
• Move a computation to a less frequently executed place
• Discover a redundant computation & remove it
• Remove useless or unreachable code
• Encode an idiom in some particularly efficient form

12
Role of Runtime System

• The executable code typically runs as a process in an


Operating System Environment.
• The application will need a number of resources from the
Operating System.
• For example, dynamic memory allocation and input output.
The process may spawn more processes of threads . If the
underline architecture has multiple processors, the
application may want to use them.

13
Role of Runtime System

• Compilers need to have a detailed knowledge of the


runtime system to make effective use of the runtime
environment and machine resources.
• The issues in this context are:
• Memory management
• Allocate and de-allocate memory
• Support for parallelism
• Garbage collection
• Run-time type checking

14
Role of Runtime System

• Error/exception processing
• Parallel threads
• Interface to OS - I/O.

15

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