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Field Effect Transistors Overview

This lecture covers Field Effect Transistors (FETs), including Junction FETs and Insulated Gate FETs (MOSFETs), detailing their types, operation, and characteristics. It explains the differences between N-type and P-type FETs, their applications in digital and analog circuits, and the significance of pinch-off voltage in their operation. The lecture also discusses the IV characteristics and operational regions of both depletion and enhancement type MOSFETs.

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0% found this document useful (0 votes)
39 views49 pages

Field Effect Transistors Overview

This lecture covers Field Effect Transistors (FETs), including Junction FETs and Insulated Gate FETs (MOSFETs), detailing their types, operation, and characteristics. It explains the differences between N-type and P-type FETs, their applications in digital and analog circuits, and the significance of pinch-off voltage in their operation. The lecture also discusses the IV characteristics and operational regions of both depletion and enhancement type MOSFETs.

Uploaded by

i246508
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

Lecture 4

Field Effect Transistors


Chapter 4 Sedra/Smith
Chapter 6 Robert
Chapter 6 Behzad Razavi
Lecture Outcomes

 Field Effect Transistors (FETs)


 Junction FETs
 N Type FET
 P Type FET
 Insulated Gate FETs (IGFET)/ Metal oxide Semiconductor FETs
(MOSFET)
 Depletion Type FET
 N Type IGFET
 P Type IGFET
 Enhancement Type FET
 N Type MOSFET
 P Type MOSFET

FET Introduction

 A three terminal device provides unique features compared to two


terminal diodes. Can be utilized as
 Switches
 Amplifiers
 Three terminal devices form the basis of transistors. Two types of
transistors are commonly used
 Bipolar Junction Transistors (BJTs)
 Field effect transistors (FETs)
 FETs are three terminal devices compared to diodes. FETs have
become far mode utilized transistors especially in the field of IC
design.
 FETs can be made quite small compared to BJTs. Manufacturing
process is simple.
FET Introduction

 FET operation requires very little power.


 Circuit designers have found indigenous topologies to implement
digital and analog circuits and functions through FETs without use
of resistors.
 Thus, a large number of FETs can be packed on a single chip
almost 2 billion to implement very sophisticated very large scale
integrated circuits (VLSI) digital circuits.
 FETs can be further divided into
 Junction Field Effect Transistor (JFET)
 Insulated Gate Field Effect Transistor (IGFET)
 If the gate terminal of an IGFET is metal and insulation is some
oxide then the type of transistor is called a metal oxide
semiconductor field effect transistor (MOSFET).
FET Introduction
 FETs can be further divided into n-Type and p-Type transistors based
on the substrate material doping conditions.

FET

JFET IGFET

Depletion Enhanceme
N-type P-type
Type nt Type

N-type P-type N-type P-type


JFET

 An N-Type JFET is represented in the figure.


 The substrate material is an N-Type material while two P-
type doped regions are created with in the body of the
transistor.
 The three terminals are marked as
 Drain
 Source
 Gate
 Therefore, the Drain and Source terminals are connected to
the ends of the N-type material with electrons as majority
charge carriers.
 A depletion region is formed around the P-regions inside the
body of the transistor. Thus, structure resembles a diode
with two depletion regions.
N Type JFET

 If an external potential is applied between Drain and


Source Terminals and Gate is connected to ground .
 The junctions become reverse biased. This reverse bias
increases with increase in .
 With and electrons in the N-region are attracted to the
positive terminal of the external source and hence the
device starts conducting current. The conventional current .
 The flow of charge is dictated by the resistance of the N-
channel.
 Now, if we keep increasing the external biasing voltage the
depletion region width starts to shrink and a point arrives
that depletion region joins.
 This voltage is called as the pinch off voltage.
 This is shown in figure.
N Type JFET

 One may assume that the current at pinch off but the
current saturates at a constant value.
 The graph represents the I-V characteristics of the
device with .
 The increasing straight line is the triode or ohmic
region. Current is dictated by the .
 Increase in increases current and resistance
decreases linearly.
 Beyond the pinch off condition the current saturates
at .
 Therefore, JFET acts as a constant current source with
current for conditions and .
N-Type JFET

 For an N-channel the can be made


more and more negative.
 The effect of makes level smaller to
reach saturation.
 The resulting saturation level of current
is less than the .
 Eventually, is sufficient to make the .
Therefore, for all practical applications
the device is turned off.

 For N-channel is negative.


 For P-channel is positive.
Regions of Operation

Saturation Region /
Linear Amplification
Region /
Constant Current Region
Triode
Region /
Ohmic Region

Cut off Region


Variable Resistor

 The region to the left of the pinch off is the ohmic region or voltage
controlled resistance region.
 The slope of each curve and thus resistance of the JFET is a function
of applied .
 The resistance of the device at particular curve can be given as:

 is the resistance with


 is the resistance at particular
P-Type JFET

 P type JFET is constructed in the same way as N-type.


But the semiconductor body is now p-type.
 The current directions are now reversed. The to
achieve pinch off region.
 The Source is now at higher potential than the Drain
terminal.
Breakdown

 A breakdown can occur just as in the diode for a


JFET.
 This region must be avoided, the device may get
permanently damaged.
 Symbolic representation of JFETs is shown in
figure.
Summary

 and

 and

 and
Transfer Characteristics of JFET

 The relationship between and are defined by the Shockley’s


equation:

 The square relationship between and gives a non-linear relationship


producing a curve that grows exponentially with decreasing
magnitude of .
 To find at some particular we can mathematically invert the above
relationship as follows:
Transfer Characteristics of JFET

 From the equation:

 If

 If

 If
Example

 Sketch the transfer curves defined by and .


 Solution:
 N-channel JFET.
 Furthermore
for
for
 For

 For
Example
 Sketch the transfer curves defined by and .
 Solution:
 P-channel JFET.
 Furthermore
for
for
 For

 For

 Note the transfer characteristics for a P-channel device has the same
shape but are a mirror image i.e. on the positive axis.
Depletion Type MOSFET

 Metal Oxide Semiconductor Field Effect Transistors


(MOSFET) are further classified into depletion and
enhancement types.
 Depletion and enhancement defines their modes of
operation.
 Depletion type MOSFET has similar I-V characteristics
as those of JFETs between cutoff and saturation region.
 The figure shows the substrate material is a p-type
semiconductors and metallic contacts of drain and
source are connected to the N-regions.
 The metallic contact of the gate is insulated with an
oxide layer of , which acts as a dielectric.
 The insulating layer has a very high input impedance
that is desirable and is higher than the JFET. The gate
current for DC applications.
Operation of Depletion Type
MOSFET
 For the and the current starts to flow between the N-channel.
The electrons are attracted towards the positive terminal of the
external source.
 This current is similar to the JFET current and hence labelled as .
 If the , made negative the free charges in N-region tend to repel
and process of recombination occurs in the P-region.
 Thus, lesser electrons are available for conduction.
 As the becomes more and more negative all free electrons are
repelled and pinch off region is achieved.
 The transfer characteristics of MOSFET are similar to the JFET in
this region.
 For the minority charge carriers “free electrons” in the P-region
get attracted towards the gate and more electrons are available
in for current conduction.
 Figure shows the transfer characteristics of the Depletion
Example

 Sketch the transfer characteristics for an n-channel depletion MOSFET


with and .
 Solution:
 At

 At

 At

 At
P-Type Depletion MOSFET

 The p-type depletion MOSFET is constructed on a n-type


semiconductor substrate.
 All the voltage polarities and current directions are reversed for p-
type MOSFET.
 The I-V characteristics will be a mirror image as that of an N-channel
MOSFET. The only difference in the plotted graph will be the Drain to
Source voltage will be negative.
 This is represented in the figure.

- - - -
1 2 3 4
Symbolic Representation

 The Depletion type MOSFET has an actual N or P channel


between the Drain and Source terminals. Thus, the symbol
contains a continuous line between D and S terminals.
 The Gate is insulated thus has a gap represented.
 If the body or substrate is connected directly to the source
terminal the symbolic representation connects the
substrate to the source terminal.
Enhancement Type MOSFET

 Although the construction and mode of operation of


an enhancement type MOSFET are similar to the
depletion type MOSFET.
 However, the transfer characteristics are very
different. The transfer curve is not defined by the
Shockley’s equation now.
 The construction is similar to depletion type. The N-
channel between the Drain and Source terminals is
absent.
Operation of Enhancement Type
MOSFET
 If there is no connection between the Drain and source
channels and hence no current. Quite different from the
depletion type MOSFET.
 With and there are effectively two depletion regions and
hence electrons face opposition to flow in these two regions.
 If and the figure represents accumulation of minority charge
carriers in the P region between the Drain and Source
terminals.
 The positive gate and insulating layer acts as a capacitor
attracting negative charges. Thus, a current channel is created.
The gate voltage at which sufficient charge carriers
accumulate to form a channel is called threshold voltage .
 Since the channel is non-existent at and is enhanced with ,
thus, called an enhancement type MOSFET.
Operation of Enhancement Type
MOSFET
 If and held constant and . The current build up and
eventually reaches a saturation value.
 Applying KVL

 If is held constant, say and is increased from 2V to 4V.


The will be

 The will be less positive. This reduction in will result in less


attraction at the drain terminal squeezing the channel
width.
 Eventually, a pinch off region is achieved driving the
MOSFET is saturation region.
Oxide Capacitance

 The capacitive effect due to insulating layer in MOSFET is given as

 is the relative permittivity of the silicon dioxide.

 The thickness of oxide layer is determined by the fabrication process


for .

 This is the gate capacitance per unit area.


IV Characteristics

 As E-MOSFET drain current cannot be defined by the


Shockley’s equation, we need to derive the drain current.
 Consider a very small section in the channel length L as .
The charge density of electrons in this small section is given
as

 The current through this section is dependent upon the


electron velocity given by

 The electric field in this section is given as change of


voltage over this section
IV Characteristics

 Integrating both sides of the equation w.r.t. length of the channel, we


get

 Therefore,

 This equation is derived assuming that the transistor is ON i.e.


IV Characteristics

 Now, from the equation if we draw a curve between


and , we get a parabolic shape due to non-linearity.
Finding the maximum value of the drain current we
can see that

 Now has direct proportionality with the . Increasing


has different peak . From figure

 With peak current always at


Voltage Controlled Variable Resistor

 We know that MOSFET operating in Triode region


follows a drain current:

 If This is called the deep triode region


IV Characteristics of MOSFET for
Saturation Region
 As the is increased further a pinch off region is
achieved. At pinch off and further the transistor
remains at the maximum current level.

 The current in parabolic shape does not drop


and remain at maximum value.

 is called the overdrive voltage.


Example

 For a certain MOSFET sketch the IV characteristics for and .


 Solution:
For
 For

 For

 For
P Channel MOSFET

 P channel MOSFET is constructed in similar fashion as an N channel


MOSFET.
 The polarity of all the currents and the voltages however is reversed.
 The IV transfer characteristics are a mirror image to that of an N
channel device.
Operation in Triode Region

 For an NMOS transistor in the triode region the


current through the transistor follows the
relationship:

 Can be rewritten as

 For an PMOS transistor in the triode region the


current through the transistor follows the
relationship:

 Can be rewritten as
Operation in Saturation Region

 For an NMOS transistor the current through the


transistor saturates once the pinch off voltage is
achieved. The current relationship is no longer
proportional to the drain and source voltage and is
given by:

 As

 For an PMOS transistor the current through the


transistor saturates once the pinch off voltage is
achieved. The current relationship is no longer
proportional to the drain and source voltage and is
given by:


Example

 Consider a fabrication process technology yielding , and .


 Find and
 For MOSFET with , calculate , , and needed to operate a transistor in
saturation region with a DC current of .
 Solution:
Example

 For operation in saturation region we have the relationship


Summary

 For a MOSFET represented in the figure.


 ; transistor is cut off
NMOS

 ; and or transistor is in triode region

 ; and or transistor is in saturation region

 The large-scale signal model is represented in the


diagram.
Example

 Consider an NMOS transistor fabricated in a 0.18 process with and .


The process technology is specified to have , , and .
 Find and if the transistor is operating at the edge of saturation at .
 If is kept constant find that drives a transistor current of .
 Solution:
 1) Transistor is operating in saturation region
Example

 As transistor is operating at the edge of saturation or in saturation


region

 At edge of saturation
Example

 2) if is kept constant and , the transistor will be operating in the


triode region

 The quadratic equation results in two solution

 The second value is higher than the and hence is practically


impossible. Therefore in the triode region
Finite Output Resistance in
Saturation
 The equation previously derived for MOSFET

 Represents that the current is independent of the in saturation


region. A small change in will produce zero change in the
current .
 Making the Drain to Source resistance of MOSFET infinite.
However, this is an idealized assumption that further increase in
has no effect on the channel shape.
 As is increased and increase the pinch off region moves further
away from the drain terminal towards the source terminal.
 This is illustrated in the figure.
 The voltage across the channel remains the additional voltage
applied across the drain terminal appears at the narrow
depletion region.
 This voltage accelerates the electrons and sweeps them into the
drain terminal.
Finite Output Resistance in
Saturation
 The channel length formed earlier is now reduced from
length to .
 This change in length phenomenon is called as channel
length modulation. Now the current was inversely
proportional to the channel length i.e. increases with
increase in .
 This factor is corrected by accounted for by the
expression:

 Here, is the channel length modulation coefficient. The


current has a linear dependence on the modulation
coefficient and hence shorter channel MOSFETs are
greatly impacted by modulation.
Example

 A MOSFET carries a drain current of 1mA at drain to source voltage of


0.5V. Determine the change in if rises to 1V, . Also find the drain to
source impedance.
 Solution:
 The MOSFET is driving a current given by expression

 Increase in the MOSFET will drive a current of

 Hence
Example

 Substituting the new values, we get

 A change or increase of 48 in the current.


 The drain to source impedance is calculated as:
Subthreshold Operation Region

 The above sections imply that for NMOS if . No current flows


through the device.
 This is not entirely true as close to but less than . A small
drain current flows between the drain and source terminals.
 This is called the subthreshold region of operation.
CMOS

 The complementary MOS (CMOS) technology employes MOS


transistors of both type NMOS and PMOS.
 CMOS are difficult to fabricate as compared to NMOS. CMOS are used
for IC designs of most types.
 The figure represents how CMOS transistors are fabricated. The NMOS
transistor is directly implemented in the substrate. The PMOS is
fabricated in a specially created N region on substrate called the
Nwell.
 Both devices are isolated from each other with a thick layer of oxide.
CMOS

 The CMOS founds many applications especially in the logic


design circuits.
 Another application is in the fabrication of inverters. The
figure represents one simple inverter design.
 If the logic levels are defined as 0V as ‘0’ and 5V as ‘1’.
The inverter will invert the input signal.
 If the input of 0V is applied the PMOS transistor is in the
ON state providing very low resistance and NMOS
transistor is in OFF state providing very high resistance.
The output is thus 5V or logic HIGH.
 If the input of 5V is applied the PMOS transistor is in the
OFF state providing very high resistance and NMOS
transistor is in ON state providing very low resistance. The
output is thus 0V or logic LOW.

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