CHAPTER NO 3

ADDRESSING MODES

Question & Answers

1. What do the following MOV instructions accomplish?

(a) MOV AX,BX

(b) MOV BX,AX
(c) MOV BL,CH
(d) MOV ESP,EBP
(e) MOV RAX,RCX
A. (a) the contents of BX is copied into AX (b) The contents of AX are copied into BX
(c) the contents of CH are copied into BL (d) the contents of EBP are copied into ESP
(e) the contents of RCX are copied into RAX
2. List the 8-bit registers that are used for register addressing.
A. AL, AH, BL, BH, CL, CH, DL, and DH
3. List the 16-bit registers that are used for register addressing.
A. AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, ES, SS, FS, and GS
4. List the 32-bit registers that are used for register addressing in the 80386 through the

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Core2

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microprocessors.

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A. EAX, EBX, ECX, EDX, ESP, EBP, EDI, and ESI

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5. List the 64-bit registers available to the 64-bit mode of the Pentium 4 and Core2.
A. RAX, RBX, RCX, RDX, RSP, RBP, RSI, RDI and R8—R15

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6. List the 16-bit segment registers used with register addressing by MOV, PUSH, and POP.
A. CS, DS, ES, SS, FS, and GS rs e
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7. What is wrong with the MOV BL,CX instruction?
A. The register sizes must be equal, 16-bit cannot be fit into 8-bits
8. What is wrong with the MOV DS,SS instruction?
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A. You may not specify mixed register sizes.

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9. Select an instruction for each of the following tasks:

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(a) copy EBX into EDX

(b) copy BL into CL
(c) copy SI into BX
(d) copy DS into AX
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(e) copy AL into AH

(f) copy R8 into R10
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A. (a) MOV EDX,EBX (b) MOV CL,BL (c) MOV BX,SI (d) MOV AX,DS (e) MOV AH,AL (f)
MOV R10,R8
10. Select an instruction for each of the following tasks:
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(a) move 12H into AL

(b) move 123AH into AX
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(c) move 0CDH into CL

(d) move 1000H into RAX
(e) move 1200A2H into EBX
A. (a) MOV AL,12H (b) MOV AX,123AH
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(c) MOV CL,0CDH (d) MOV RAX,1000H

(e) MOV EBX,1200A2H
11. What special symbol is sometimes used to denote immediate data?
A. #
12. What is the purpose of the .MODEL TINY statement?
A. Selects an assembly language programming model that
contains a single segment that compiles as a .COM

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 CHAPTER NO 3
ADDRESSING MODES
program.

13. What assembly language directive indicates the start of the CODE segment?
A. .CODE
14. What is a label?
A. A label is a symbolic memory address.
15. The MOV instruction is placed in what field of a statement?
A. Opcode
16. A label may begin with what characters?
A. A label may begin with a letter and some special
characters, but not with a number.
17. What is the purpose of the .EXIT directive?
A. . It ends the program by exiting to the operating system
18. Does the .MODEL TINY statement cause a program to assemble as an execute (.EXE)
program?

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A. The .TINY model creates a .COM program.
19. What tasks does the .STARTUP directive accomplish in the small memory model?

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A. The .STARTUP directive loads the DS register

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20. What is a displacement? How does it determine the memory address in a MOV

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DS:[2000H],AL instruction?
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A. A displacement is a distance and in MOV
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DS:[2000H],AL the displacement of 2000H is added to
the contents of DS times 10H to form the memory
address.
21. What do the symbols [ ] indicate?
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A. Indirect addressing
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22. Suppose that . Determine the memory address

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accessed by each of the following instructions, assuming real mode operation:

(a) MOV AL,[1234H]
(b) MOV EAX,[BX]
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(c) MOV [DI],AL

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A. (a) 3234H (b) 2300H (c) 2400H

23. What is wrong with a MOV [BX],[DI] instruction?
A. Memory to memory transfers are not allowed with the MOV instruction
24. Choose an instruction that requires BYTE PTR.
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A. MOV BYTE PTR [2000H],6

25. Choose an instruction that requires WORD PTR.
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A. INC WORD PTR [EDI]

26. Choose an instruction that requires DWORD PTR.
A. MOV DWORD PTR DATA1, 5
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27. Select an instruction that requires QWORD PTR.

A. DEC QWORD PTR [RAX]
28. Explain the difference between the MOV BX,DATA instruction and the MOV BX,OFFSET
DATA instruction.
A. The MOV BX,DATA instruction copies the word
from memory location data into the BX register
where the MOV BX,OFFSET DATA instruction

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 CHAPTER NO 3
ADDRESSING MODES
copies the offset address of DATA into BX
29. Suppose that . Determine the
memory address accessed by each of the following instructions, assuming real mode
operation:
(a) MOV AL,[ ] BP+DI
DS = 1000H, SS = 2000H, BP = 1000H, and DI = 0100H
DS = 0200H, BX = 0300H, and DI = 400H
ADDRESSING MODES 109
(b) MOV CX,[DI]
(c) MOV EDX,[BP]
A. (a) 21110H (b) 10100H (c) 21000H
30. What, if anything, is wrong with a MOV AL,[BX][SI] instruction?
A. Nothing is wrong with the instruction; it just uses an
alternative addressing style.
31. Suppose that . Determine the address accessed
by each of the following instructions, assuming real mode operation:
(a) MOV [100H],DL

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(b) MOV [ ],EAX

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(c) MOV DL,[ ]

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A. (a) 12100H (b) 12350H (c) 12220H

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32. Suppose that . Determine
the address accessed by each of the following instructions, assuming real mode operation:

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(a) MOV LIST[SI],EDX
(b) MOV CL,LIST[ ] rs e
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(c) MOV CH,[ ]
A. (a) 11750H (b) 11950H (c) 11700H
33. Suppose that . Determine the
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address accessed by each of the following instructions, assuming real mode operation:
(a) MOV EAX,[ ]
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(b) MOV AL,[ ]

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(c) MOV AL,[ ]

A. (a) 11750H (b) 11950H (c) 11700H
34. Which base register addresses data in the stack segment?
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A. BP or as an extended version EBP

35. Suppose that . Determine the
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addresses accessed by the following instructions, assuming real mode operation:

(a) MOV ECX,[ ]
(b) MOV [ ],CL
(c) MOV DH,[ ]
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A. (a) 15700H (b) 05100H (c) 07100H

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36. Develop a data structure that has five fields of one word each named Fl, F2, F3, F4, and
F5
with a structure name of FIELDS
A. FIELDS STRUC
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F1 DW ?
F2 DW ?
F3 DW ?
F4 DW ?
F5 DW ?
FIELDS ENDS
37. Show how field F3 of the data structure constructed in question 36 is addressed in a
program. A. Not Given

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 CHAPTER NO 3
ADDRESSING MODES
38. What are the three program memory-addressing modes?
A. Direct, relative, and indirect
39. How many bytes of memory store a far direct jump instruction? What is stored in each of
the bytes?
A. 5, the first byte is the opcode, followed by a two byte segment address, followed
by a two byte offset address

40. What is the difference between an intersegment and intrasegment jump?

A. The intersegment jump allows jumps between segments or to anywhere in the memory
system while the
intrasegment jump allows a jump to any location
within the current code segment.
41. If a near jump uses a signed 16-bit displacement, how can it jump to any memory
location
within the current code segment?

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A. ±32K
42. The 80386 and above use a ____________-bit displacement to jump to any location within

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the 4G-byte code segment.

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A. 32

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43. What is a far jump?

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A. A far jump always a jump to any location in the memory map
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44. If a JMP instruction is stored at memory location 100H within the current code segment,
it
cannot be a ____________ jump if it is jumping to memory location 200H within the current
code segment.
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A. Short
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45. Show which JMP instruction assembles (short, near, or far) if the JMP THERE instruction is
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stored at memory address 10000H and the address of THERE is:

(a) l0020H
(b) 11000H
(c) 0FFFEH
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(d) 30000H
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A. (a) short (b) near (c) short (d) far

46. Form a JMP instruction that jumps to the address pointed to by the BX register
A. JMP BX
47. Select a JMP instruction that jumps to the location stored in memory at the location
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TABLE.
Assume that it is a near JMP.
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A. JMP NEAR
48. How many bytes are stored on the stack by a PUSH AX?
EBX+4*EAX+1000H
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EAX+2*EBX
EAX+EBX
EAX = 00001000H, EBX = 00002000H, and DS = 0010H
SI-0100H
BP+SI-200H
BP+200H
DS = 1300H, SS = 1400H, BP = 1500H, and SI = 0100H

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 CHAPTER NO 3
ADDRESSING MODES
BX+SI
BX+SI
DS = 1100H, BX = 0200H, LIST = 0250H, and SI = 0500H
BX+100H
SI+100H
DS = 1200H, BX = 0100H, and SI = 0250H
A. 2
49. Explain how the PUSH [DI] instruction functions.
A. PUSH [DI] places the 16-bit contents of the location addressed by DS and DI onto
the stack. 50. What registers are placed on the stack by the PUSHA
instruction? In what order? A. AX, CX, DX, BX, SP, BP,
DI, and SI in the same
order as listed

51. What does the PUSHAD instruction accomplish?

A. Places the 32-bit contents of he register array onto the stack

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52. Which instruction places the EFLAGS on the stack in the Pentium 4 microprocessor?

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A. PUSHFD

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53. Is a PUSHA available in the 64-bit mode of the Pentium 4 or the Core2?

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A. no

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