1Define computer Deisgn.

Computer Design is the structure in which components relate to each other.

The architectural design of a computer system is concerned with the specifications of the
various functional modules, such as processors and memories, and structuring them
together into a computer system. 1 Mark

Computer designing aims to enhance the functionality and performance of computers while
ensuring they meet the user's needs and preferences. 1 Mark

2What is Address sequencing?

Address sequencing in computer organization refers to the method by which a computer's

memory addresses are generated and accessed during data retrieval or instruction
execution. It involves determining the order in which addresses are accessed, which is
crucial for efficient memory operations and overall system performance. 1 Mark

 Each machine instruction is executed through the sequence of microinstructions.

 The collection of microinstructions which implements a particular
machine instruction is called a routine. 1 Mark

3Define physical memory.

Physical memory is fundamental to a computer’s operation, providing the necessary

storage for programs and data that the CPU needs to execute tasks. 1 Mark

Physical memory refers to the actual hardware components used to store data and
instructions in a computer system. This includes all types of memory that are
physically present in the computer. 1 Mark

4List assembler operators.

Assembler is a program for converting instructions written in low-level assembly code into
relocatable machine code and generating along information for the loader.

Data Definition Operators: 1 Mark

 DB (Define Byte): Allocates space for a byte or bytes.

 DW (Define Word): Allocates space for a word (typically 2 bytes).
 DD (Define Doubleword): Allocates space for a doubleword (typically 4 bytes).
  DQ (Define Quadword): Allocates space for a quadword (typically 8 bytes).
 DT (Define Ten Bytes): Allocates space for ten bytes. 1 Mark

5Define interrupt.

The interrupt is a signal emitted by hardware or software when a process or an event needs
immediate attention. It alerts the processor to a high-priority process requiring interruption
of the current working process. 1 Mark

Hardware Interrupts: Generated by hardware devices

Software Interrupts: Generated by programs, often through system calls

In I/O devices one of the bus control lines is dedicated for this purpose and is called the
Interrupt Service Routine (ISR). 1 Mark

6What is procedure?

a procedure (also known as a subroutine or function) is a block of code designed to perform a

specific task. Procedures help organize code, promote reusability, and facilitate easier
debugging and maintenance. 1 Mark

Key Characteristics of Procedures:

1. Modularity
2. Reusability
3. Parameter Passing 1 Mark

7Define priority interrupt.

a priority interrupt is a mechanism used to manage multiple interrupt requests from different
sources. Each interrupt can be assigned a priority level, allowing the system to determine
which interrupt should be serviced first based on its importance. 1 Mark

A priority interrupt is a system that determines the priority at which devices generating
interrupt signals simultaneously should be serviced by the CPU first. High-speed transfer
devices are generally given high priority, and slow devices have low priority. 1 Mark

8What is Asynchronous transfer ?

Asynchronous transfer is a method of data transfer in which the sender and receiver operate
independently regarding timing, without a shared clock signal. Data is transmitted using
control signals, such as start and stop bits, to indicate when data begins and ends. 1 Mark

This approach allows devices with different operating speeds to communicate effectively and is
commonly used in protocols like RS-232 and UART. While it simplifies implementation and
reduces costs, it introduces overhead due to additional bits and potential latency in data
transmission. 1 Mark

9Define auxiliary memory.

Auxiliary memory, also known as secondary storage, refers to non-volatile storage devices
used to store data and programs. 1 Mark

Examples include hard drives, solid-state drives, and optical disks. Unlike primary memory,
auxiliary memory retains information even when the power is turned off, providing larger
storage capacity and permanent data retention. 1 Mark

10 Define RISC.

RISC (Reduced Instruction Set Computer) is a microprocessor architecture that uses a small,
highly optimized set of instructions to improve performance and simplify hardware design.
1 Mark
Key features include a load/store architecture, fixed instruction length, and support for
pipelining, which allows multiple instruction phases to be processed simultaneously. This
focus on efficiency enables faster execution and enhances overall system performance.
1 Mark

11Explain about instruction codes.

 An instruction code is a group of bits that instruct the computer to perform a

specific operation.
 The operation code of an instruction is a group of bits that define operations such
as addition, subtraction, shift, complement, etc.
 An instruction must also include one or more operands, which indicate the
registers and/or memory addresses from which data is taken or to which data is
deposited.
2 Marks
The basic computer has three instruction code formats:
Memory-reference format – where seven 3-bit opcodes are followed by a 12-bit memory
address and preceded by a bit which indicates whether direct or indirect addressing is
being used.
Register-reference format – where 01112 is followed by 12 bits which indicate a register
instruction.
Input-output format – where 11112 is followed by 12 bit which indicate an input-output instruction
3 Marks
 Structure of an Instruction Code
In general, each instruction code is 16-bit and consists of three parts called fields, which
include:
 The mode field defines how the location of the operand can be found by
the computer.
 The operation code field or Opcode specifies the operation, such as addition,
subtraction, shift, and complement, to be performed. The bits required for the
operation code may vary as it is dependent on the total operations available on
the computer.
 The address field contains the operand’s address, that is, memory or register memory
location. The operand is stored in the computer’s memory just as data is stored.
Based on the address of the operand, there are different types of operands: direct
operand, indirect operand, and immediate operand. 5 Marks

12Describe the instruction cycle in a basic computer organization and design.

The instruction cycle comprises three main stages. The stages are as follows:
I. Fetch stage
II. Decode stage
III. Execute stage
 5 Marks

◻ Fetch:

 The CPU retrieves the next instruction from memory. The address of the instruction
is stored in the Program Counter (PC), which is then incremented to point to the
next instruction.

◻ Decode:

 The fetched instruction is decoded to determine the operation to be performed and

the operands involved. This involves interpreting the opcode and identifying the
required resources (e.g., registers, memory addresses).

◻ Execute:

 The CPU carries out the operation specified by the instruction. This could involve
arithmetic calculations, logic operations, data movement, or control flow
changes.

The instruction cycle repeats continuously, allowing the CPU to process instructions
sequentially. Each cycle typically takes several clock cycles to complete, depending on
the complexity of the instruction and the architecture of the CPU. 5 Marks

13Explain about Register organization, Physical memory organization of

8086 microprocessor.

The register organization of the 8086 microprocessor can be divided into four categories:
general-purpose registers, segment registers, instruction pointer, and status/control
registers.

General-Purpose Registers:

The 8086 microprocessor has eight 16-bit general-purpose registers, which can be used for a
variety of purposes, including storing data and memory addresses. These registers are named
AX, BX, CX, DX, SI, DI, BP, and SP. The AX register is the accumulator register and is
used for arithmetic and logic operations
Segment Registers: 2 Marks

The 8086 microprocessor has four 16-bit segment registers, which are used to address
memory in a segmented memory model. These registers are named CS, DS, SS, and ES.

Instruction Pointer:

The 8086 microprocessor has a 16-bit instruction pointer (IP) register, which holds the offset
address of the next instruction to be executed. The IP register works in conjunction with the
CS register to form a 20-bit physical address, which is used to fetch instructions from
memory.

Status/Control Registers:

The 8086 microprocessor has several status and control registers, which are used to control
the operation of the CPU and to store status information about the current operation.

The flags register (FLAGS) is a 16-bit register that contains several status flags, including the
carry flag, zero flag, sign flag, and overflow flag. These flags are used to indicate the result
of arithmetic and logic operations.

Flags Register: (3 Marks)

The flags register in the 8086 microprocessor is a 16-bit register that contains several flags
that indicate the status of certain operations performed by the processor. These flags are set or
reset based on the result of the operation, and they can be used to control program flow and
make decisions.

The following are the flags in the 8086 microprocessor:

Carry Flag (CF)

This flag is set when an arithmetic operation generates a carry or a borrow. It is used to
indicate whether an operation resulted in an overflow or underflow.

Zero Flag (ZF)

This flag is set when the result of an arithmetic or logical operation is zero. It is used to
determine whether an operation produced a null result.

Sign Flag (SF)

This flag is set when the result of an arithmetic or logical operation is negative. It is used to
determine the sign of the result.

Overflow Flag (OF)

This flag is set when an arithmetic operation produces a result that is too large or too small to
be represented in the destination register. It is used to indicate whether an operation resulted
in an overflow or underflow.
Parity Flag (PF)

This flag is set when the result of an arithmetic or logical operation has an even number of set
bits. It is used to check the parity of the result.

Auxiliary Carry Flag (AF) 2 Marks

This flag is set when an arithmetic operation generates a carry or a borrow between bits 3 and
4 of a byte. It is used to indicate whether an operation resulted in an overflow or underflow.

Physical memory organization:

The 8086 microprocessor has a physical memory space of 1 megabyte (2^20 bytes), which is
divided into several segments. The physical memory organization of the 8086 microprocessor
is as follows:

Code Segment (CS): This segment is used to store the program code. The code segment is
a read-only segment, and any attempt to write to this segment will result in a protection
fault.

Data Segment (DS): This segment is used to store data used by the program. This segment is
used for variables, arrays, and data structures. The data segment is a read-write segment,
and the program can read from and write to this segment.

Stack Segment (SS): This segment is used to store the stack used by the program. The stack is
a data structure used to store temporary data during the execution of the program.

Extra Segment (ES): This segment is an additional data segment that can be used to store
additional data used by the program.

Physical Address Space: The physical address space of the 8086 microprocessor is 1
megabyte, which is divided into 16-bit segments. Each segment can address up to 64
kilobytes of memory. 3Marks
14Discuss about I/O Addressing Capability.

I/O addressing capability refers to the mechanisms used by a computer system to identify and
communicate with input/output devices. This is essential for efficient data transfer between
the CPU and peripherals like keyboards, printers, and storage devices. The two primary
methods of I/O addressing are:

1. Memory-Mapped I/O (MMIO):

o Description: In MMIO, I/O devices are mapped into the same address space
as system memory. Both memory and I/O devices can be accessed using
standard data manipulation instructions.
o Advantages:
 Simplifies programming by allowing the use of standard
CPU instructions.
 Provides direct access to device registers as if they were memory
locations.
o Disadvantages:
 Reduces the available memory space for RAM, as part is allocated
for I/O devices. ( 5Marks)
 2. Port-Mapped I/O (PMIO):
o Description: PMIO, also known as isolated I/O, uses a separate address space
for I/O devices. Special instructions (e.g., IN and OUT) are utilized to access
these devices.
o Advantages:
 Preserves the memory space for RAM, enabling more
addressable memory.
 Allows for a potentially larger number of I/O devices.
o Disadvantages:
 Requires additional CPU instructions specifically for I/O operations.

◻ Direct Memory Access (DMA):

 DMA enables certain peripherals to access system memory without CPU

intervention, facilitating high-speed data transfers and improving system efficiency.

◻ Interrupts:

 Devices can use interrupts to signal the CPU when they need service, allowing the
CPU to perform other tasks instead of polling devices, which enhances overall
system performance. ( 5 Marks)

15Explain Assembler directives of 8086 microprocessor.

Assembler directives, also known as pseudo-operations, are commands in assembly language

that provide instructions to the assembler but do not translate into machine code. These
directives help in organizing code, defining data, and controlling the assembly process.

key assembler directives used in the 8086 microprocessor:

Assembler Directives of the 8086 Microprocessor :-

(a) The DB directive

(b) The DW directive

(c) The DD directive

(d) The STRUCT (or STRUC) and ENDS directives (counted as one)

(e)The EQU Directive

(f)The COMMENT directive

(g)ASSUME

(h) EXTERN

(i) GLOBAL

(j) SEGMENT
 (k) OFFSET

(l) PROC

(m)GROUP

(n) INCLUDE

(5 Marks)

DATA Section:
Description: This directive defines the beginning of a data segment
o
where variables and constants are declared.
CODE Section:
 Description: Indicates the beginning of the code segment where the
executable instructions are written.
STACK Directive:

 Description: Specifies the stack segment's size and location, crucial for
managing function calls and local variables.

DB (Define Byte):

 Description: Allocates space for a byte or bytes and initializes them with
specified values.

DW (Define Word):

 Description: Allocates space for a word (2 bytes) and initializes it.

DD (Define Double Word):

 Description: Allocates space for a double word (4 bytes) and initializes it.
ALIGN:
 Description: Aligns data on a specified boundary (e.g., 2-byte or 4-byte boundaries)
to enhance performance.
END Directive:
 Description: Marks the end of the source code, signaling the assembler to
stop processing. (5 Marks)

16Explain the passing parameters to procedures in 8086 microprocessors.

In the 8086 microprocessor, procedures (also known as subroutines or functions) allow for
modular programming, enabling code reusability and better organization. When calling
procedures, it's essential to pass parameters (arguments) so the procedure can perform its task
based on the provided values. There are several methods to pass parameters in the 8086
architecture:
1. Using the Stack

 Description: The most common method for passing parameters is to push them
onto the stack before calling the procedure. The procedure can then access these
parameters by popping them from the stack.

Using Registers

 Description: Parameters can also be passed using registers. This method is faster than
using the stack but limits the number of parameters since there are only a few general-
purpose registers available.
 .model small


.data
 MULTIPLICAND DW 1234H
 MULTIPLIER DW 4232H
 .code

 MOV AX, MULTIPLICAND
 MOV BX, MULTIPLIER
 CALL MULTI

 :
 :
 MULTI PROC NEAR




MUL BX RET ; Procedure to access data from BX register

MULTI ENDP
:
: END

(5 Marks)

Using Memory (Data Segment)

 Description: Parameters can be stored in a specific memory location, and the

procedure can access them using their addresses. This is useful for larger
data structures.
 .model small


.data
 MULTIPLICAND DW 1234H ; Storage for multiplicand value
MULTIPLIER DW 4232H ; Storage for multiplier value
  MULTIPLICATION DW ? ; Storage for multiplication result


.code
 MOV AX, @Data MOV DS, AX
 :
 :

 CALL MULTI
 :
 :

 MULTI PROC NEAR
 MOV AX, MULTIPLICAND MOV BX, MULTIPLIER
 :

:

MOV MULTIPLICATION, AX; Store the multiplication value in named memory l ocation
RET
 MULTI ENDP END



Parameter Size Considerations

 When passing parameters, it's crucial to consider their size (byte, word, double
word) and ensure that the procedure expects the correct data type. Misalignment can
lead to incorrect results or crashes. (5Marks)

17Explain about Peripheral Devices, Input-Output Interface?

1. Peripheral Devices

Peripheral devices are external hardware components that connect to the computer system to
provide additional functionality. They can be categorized into three main types:

 Input Devices:
o Function: These devices allow users to enter data and commands into
the computer.
o Examples: Keyboards, mice, scanners, microphones.
 Output Devices:
o Function: These devices present data processed by the computer to the user.
o Examples: Monitors, printers, speakers.
 Storage Devices:
o Function: These devices store data and information permanently
or temporarily.
o Examples: Hard drives, SSDs, USB flash drives, CDs.

Peripheral devices can be connected to the computer via various interfaces, which are often
categorized as internal (inside the computer case) or external (outside the computer case).
 (3 Marks)

2. Input-Output Interface

The input-output (I/O) interface is the communication pathway between the CPU and
peripheral devices. It translates the signals sent to and from the CPU to be compatible with
the peripheral devices. Key aspects of I/O interfaces include:

 Types of I/O Interfaces:

o Memory-Mapped I/O: In this method, devices are mapped to the same
address space as the system memory, allowing the CPU to use standard
instructions to communicate with peripherals.
o Port-Mapped I/O (Isolated I/O): This method uses a separate address space
for I/O devices, requiring specific instructions (like IN and OUT in x86
architecture) to access them.
 Data Transfer Methods:
o Programmed I/O: The CPU actively controls the data transfer process by
polling the device status. This can lead to inefficiency, especially with
slow devices.
o Interrupt-Driven I/O: The peripheral devices send an interrupt signal to the
CPU when they require attention, allowing the CPU to perform other tasks
in the meantime.
o Direct Memory Access (DMA): This method allows peripheral devices to
transfer data directly to memory without CPU intervention, improving data
transfer rates and CPU efficiency. (5 Marks)

3. I/O Ports and Control Signals

I/O interfaces use ports (physical or virtual connections) to facilitate communication. Each
device is assigned a unique I/O port address, and control signals (like read/write signals)
dictate the operation being performed.

4. Device Drivers

Device drivers are software components that enable the operating system to communicate
with hardware devices. They act as translators between the operating system and the
hardware, ensuring proper functioning and management of peripheral devices. (2 Marks)

3. Describe the algorithm for integer division with suitable examples?

Integer division is a fundamental operation in computer arithmetic where one integer is

divided by another, resulting in a quotient and a remainder. The algorithm for performing
integer division can be illustrated through a step-by-step process. Below is a commonly
used algorithm for integer division, known as the "repeated subtraction method" or the "long
division" approach. (2 Marks)

Algorithm Steps

1. Initialization:
o Let Dividend be the integer to be divided.
 o Let Divisor be the integer by which the Dividend is divided.
o Initialize Quotient to 0 and Remainder to Dividend.
2. Check Divisor:
o If Divisor is 0, division is undefined. Return an error message.
3. Repeated Subtraction:
o While Remainder is greater than or equal to Divisor:
 Subtract Divisor from Remainder.
 Increment Quotient by 1.
4. Return Results:
o After the loop ends, Quotient holds the result of the integer division,
and Remainder holds the remaining value. (3 Marks)

Example 1: Dividing 17 by 5

1. Initialization:
o Dividend = 17
o Divisor = 5
o Quotient = 0
o Remainder = 17
2. Check Divisor:
o Divisor is not 0.
3. Repeated Subtraction:
o First iteration:
 Remainder = 17 - 5 = 12
 Quotient = 1
o Second iteration:
 Remainder = 12 - 5 = 7
 Quotient = 2
o Third iteration:
 Remainder = 7 - 5 = 2
 Quotient = 3
o Fourth iteration:
 Remainder = 2 (less than 5, stop here)
4. Return Results:
o Quotient = 3
o Remainder = 2

Result: 17÷5=317 \div 5 = 317÷5=3 with a remainder of 222.

Example 2: Dividing 20 by 4 (5 Marks)

1. Initialization:
o Dividend = 20
o Divisor = 4
o Quotient = 0
o Remainder = 20
2. Check Divisor:
o Divisor is not 0.
3. Repeated Subtraction:
o First iteration:
 Remainder = 20 - 4 = 16
  Quotient = 1
o Second iteration:
 Remainder = 16 - 4 = 12
 Quotient = 2
o Third iteration:
 Remainder = 12 - 4 = 8
 Quotient = 3
o Fourth iteration:
 Remainder = 8 - 4 = 4
 Quotient = 4
o Fifth iteration:
 Remainder = 4 - 4 = 0
 Quotient = 5
o Sixth iteration:
 Remainder = 0 (stop here)
4. Return Results:
o Quotient = 5
o Remainder = 0

Result: 20÷4=520 \div 4 = 520÷4=5 with a remainder of 000.

18 Explain about Auxiliary memory.

Auxiliary memory, also known as secondary memory or external storage, refers to non- volatile
storage devices that are used to store data and programs permanently or for extended
periods. Unlike primary memory (RAM), which is volatile and loses its content when the
power is turned off, auxiliary memory retains data even when the system is powered down.
This makes it essential for data storage, backup, and long-term retrieval. (2 marks)

Key Characteristics of Auxiliary Memory

1. Non-Volatile Storage:
o Auxiliary memory retains data without requiring continuous power, making
it suitable for long-term storage.
2. Larger Capacity:
o It typically offers a much larger storage capacity compared to primary
memory, enabling users to store vast amounts of data, applications, and files.
3. Slower Access Speed:
o Access times are generally slower than primary memory. While RAM
allows for fast read and write operations, accessing data from auxiliary
memory can take more time.
4. Cost-Effectiveness:
o Auxiliary memory tends to be more cost-effective per gigabyte than primary
memory, allowing users to store more data at a lower cost.
5. Variety of Formats:
o Auxiliary memory comes in various forms, including magnetic, optical,
and solid-state storage. (3 Marks)

Types of Auxiliary Memory

1. Magnetic Storage:
 o Hard Disk Drives (HDD): These use magnetic disks to read and write
data. They provide high storage capacity and are commonly used in
computers.
o Magnetic Tapes: Used primarily for backup and archival storage,
magnetic tapes are sequential access devices with high capacity and low
cost.
2. Optical Storage:
o Compact Discs (CDs): CDs can store data, music, or software. They are
less commonly used now but were popular for software distribution.
o Digital Versatile Discs (DVDs): DVDs offer higher capacity than CDs and
are used for video storage and software.
o Blu-ray Discs: These provide even greater storage capacity and are used for
high-definition video.
3. Solid-State Storage:
o Solid-State Drives (SSDs): These use flash memory to provide faster access
speeds and are increasingly popular as replacements for traditional HDDs.
o USB Flash Drives: Portable and easy to use, these devices are commonly
used for transferring files between computers. (5 Marks)

19Define pipelining and explain instruction pipeline.

Pipelining is a technique used in computer architecture to improve the execution efficiency of

instruction processing by overlapping the execution of multiple instructions. This approach
allows a processor to work on several instructions simultaneously, significantly increasing
throughput and overall performance.

Key Concepts of Pipelining

1. Stages of Instruction Processing:

o In a pipelined architecture, the execution of an instruction is divided
into several stages, with each stage handling a specific part of the
instruction processing.
o Common stages include:
 Fetch (IF): Retrieving the instruction from memory.
 Decode (ID): Interpreting the instruction and reading the necessary
operands.
 Execute (EX): Performing the operation specified by the instruction.
 Memory Access (MEM): Accessing memory if needed (for
load/store instructions).
 Write Back (WB): Writing the result back to the register file.
2. Parallelism:
o Pipelining allows different stages of multiple instructions to be processed in
parallel. While one instruction is being executed, another can be decoded,
and yet another can be fetched.
3. Increased Throughput:
o The primary advantage of pipelining is increased instruction throughput.
With a properly implemented pipeline, the processor can complete an
instruction every clock cycle after the initial fill period.

Instruction Pipeline (5 Marks)

The instruction pipeline is a specific application of pipelining, focused on the stages involved in
executing machine instructions. Here’s how it works:
Stages of Instruction Pipeline

1. Instruction Fetch (IF):

o The CPU retrieves the instruction from memory using the program
counter (PC), which points to the address of the next instruction to be
executed.
2. Instruction Decode (ID):
o The fetched instruction is decoded to understand the operation to be performed
and to identify the operands involved. The necessary registers are read during
this stage.
3. Execute (EX):
o The actual operation is performed using the ALU (Arithmetic Logic Unit).
If the instruction is a computation, this stage calculates the result.
4. Memory Access (MEM):
o If the instruction involves reading from or writing to memory (like load or
store operations), this is done in this stage. For other types of instructions, this
stage may be skipped.
5. Write Back (WB):
o The result of the operation is written back to the appropriate register in
the register file.

Example of Instruction Pipeline

Consider a sequence of instructions:

1. ADD R1, R2, R3 (R1 = R2 + R3)

2. SUB R4, R1, R5 (R4 = R1 - R5)
3. AND R6, R1, R7 (R6 = R1 AND R7) (5 Marks)