UNIT IV SEMICONDUCTOR DEVICES

VI Characteristics of PN-junction diodes and Zener diodes, BJT and its configurations –input/
output Characteristics, Junction Field Effect Transistor –Drain and Transfer Characteristics,
MOSFET –Depletion type and Enhancement type, Uni Junction Transistors –Silicon
Controlled Rectifiers.

CLASSIFICATION OF MATERIALS :

Materials can be classified based on its conductivity property as:

Conductor: A conductor is a material which allows free flow of charge when a voltage is
applied across its terminals. i.e. it has very high conductivity. Eg: Copper, Aluminum, Silver,
Gold.
Semiconductor: A semiconductor is a material that has its conductivity somewhere between
the insulator and conductor. The resistivity level is in the range of 10 and 104 Ω- cm. Eg:
Silicon and Germanium. Both have 4 valance electrons. Electronic devices like PN diode, Zener
diode Bipolar Junction Transistor are made using these semiconductors.
Insulator: An insulator is a material that offers a very low level (or negligible) of conductivity
when voltage is applied. Eg: Paper, Mica, glass, quartz.
Classification of semiconductors
 Intrinsic semiconductor
 Extrinsic semiconductor
Intrinsic semiconductor
They are semi-conducting materials which are pure and no impurity atoms are added to it. Eg:
Germanium and Silicon.

Properties:
• Number of electrons is equal to the number of holes. I.e., ne=nh.
• Electrical conductivity is low.
• Electrical conductivity of intrinsic semiconductors depends on their
temperatures.
•
Extrinsic semiconductors
Intrinsic semiconductor has very limited applications as they conduct very small amounts of
current at room temperature. The current conduction capability of intrinsic semiconductor can
be increased significantly by adding a small amounts impurity to the intrinsic semiconductor.
By adding impurities it becomes impure or extrinsic semiconductor. This process of adding
impurities is called as doping. The amount of impurity added is 1 part in 106 atoms
Properties:
• The number of electrons is not equal to the number of holes.
• The electrical conductivity is high.
• The electrical conductivity depends on the temperature and the amount of
impurity added in them. They are further subdivided as
• P type semiconductor
• N type semiconductor

2
P type semiconductor:

When a intrinsic semiconductor is added with Trivalent impurity it becomes a P- Type

semiconductor. Examples of trivalent impurities are Boron, Gallium, indium etc.

Fig. 4.1 P type Semiconductor

The crystal structure of P type semiconductor is shown in the Fig. 4.1. The three valance
electrons of the impurity (boron).
forms three covalent bonds with the neighboring atoms and a vacancy exists in the fourth bond
giving rise to the holes. The hole is ready to accept an electron from the neighboring atoms.
Each trivalent atom contributes to one hole generation and thus introduces a largeno. of holes in
the valance band. At the same time the no. electrons are decreased comparedto those available in
intrinsic semiconductor because of increased recombination due to creation of additional holes.
Thus in P type semiconductor,
• Holes are majority carriers and electrons are minority carriers.
• The semiconductor is rich in holes. N

type semiconductor:

If the added impurity is a pentavalent atom then the resultant semiconductor is called N- type
semiconductor. Examples of pentavalent impurities are Phosphorus, Arsenic, Bismuth,
Antimony etc.
A pentavalent impurity has five valance electrons. Fig 4.2 shows the crystal structure of N
type semiconductor material where four out of five valance electrons of the impurity
atom(antimony) forms covalent bond with the four intrinsic semiconductor atoms. The fifth
electron is loosely bound to the impurity atom. This loosely bound electron can be easily
excited from the valance band to the conduction band by the application of electric field or
increasing the thermal energy. The energy required to detach the fifth electron form the
impurity atom is very small of the order of 0.01ev for Ge and 0.05 eV for Si. Thus in a N type
semiconductor
• Electrons are majority carriers and holes are minority carriers.
• The semiconductor is rich in electrons.
 Electro

Fig. 4.2 N type Semiconductor

4.1.PN JUNCTION THEORY

When P and N type semiconductors are fused together, we obtain PN junction. When first joined
together, very large density gradient exists between both sides of the PN junction. Therefore at
the junction there is a tendency of free electrons from N side to diffuse over to the P side and
the holes to the N side. This process is called diffusion. Hence some of the free electrons from
the N side begin to migrate across this newly formed junction to fill up the holes in the P-
type material.
As the free electrons move across the junction from N type to P type, they leave behind
positively charge (donor ions) on the negative side and hence a positive charge is built on the
N-side of the junction. Similarly, the holes from the P side migrate across the junction in the
opposite direction into the N region where there are large numbers of free electrons. As a result,
the charge density of the P-type along the junction is filled with negatively charged acceptor
ions, and hence a negative charge is built on the P-side of the junction. The width of these
layers depends on how heavily each side is doped with acceptor density and donor density
respectively.
The electrostatic field across the junction caused by the positively charged N-Type regiontends
to drive the holes away from the junction and negatively charged P type regions tend to drive
the electrons away from the junction. Thus near the junction, a region depleted of mobile
charge carriers is formed. This is called depletion layer, space region, and transition region.
The depletion region is of the order of 0.5µm thick. There are no mobile carriers in this
narrow depletion region. Hence no current flows across the junction and the system is in
equilibrium.
 Fig. 4.3 PN junction
FORWARD BIASED OPERATION

When external voltage is applied then the potential difference is altered between the P and N
regions. Positive terminal of the source is connected to the P side and the negative terminal is
connected to N side then the PN junction diode is said to be connected in forward bias
condition. This lowers the potential across the junction. The majority charge carriers in N and P
regions are attracted towards the PN junction and the width of the depletion layer decreases
with diffusion of the majority

Fig. 4.4 Forward bias PN junction diode

charge carriers. The external biasing causes a departure from the state of equilibrium and also
in the depletion layer. With the increase in forward bias greater than the built in potential, at a
particular value the depletion region becomes very much thinner so that a large number of
majority charge carriers can cross the PN junction and conducts an electric current. The
current flowing up to built in potential is called as ZERO current orKNEE current.
 Reverse Bias Operation

Positive terminal of the source is connected to the N side and the negative terminal is
connected to P side. Here majority charge carriers are attracted away from the depletion layer
by their respective battery terminals connected to PN junction. Positive terminal attracts the
electrons away from the junction in N side and negative terminal attracts the holes away from
the junction in P side. As a result of it, the width of the potential barrier increases that impedes
the flow of majority carriers in N side and P side. The width of the free space charge layer
increases, thereby electric field at the PN junction increases and the PN junction diode acts as
a resistor. The current that flows in a PN junction diode is the small leakage current, due to
minority carriers generated at the depletion layer or minority carriers which drift across the
PN junction. The growth in the width of the depletion layer presents a high impedance path
which acts as an insulator.

Fig. 4.5 Reverse bias PN junction diode

.VI characteristics of PN Diode

The VI characteristics of PN junction diode in forward bias are non linear, that is, not a straight
line. This nonlinear characteristic illustrates that during the operation of the PN junction, the
resistance is not constant. The slope of the PN junction diode in forward bias shows the
resistance is very low. When forward bias is applied to the diode if this external voltage
becomes greater than the value of the potential barrier, approx. 0.7 volts for silicon and 0.3 volts
for germanium, then it causes a low impedance path and permits to conduct a large amount of
current. Thus the current starts to flow above the knee point with a small amount of external
potential.
In reverse bias condition, the P-type of the PN junction is connected to the negative terminal
and N-type is connected to the positive terminal of the external voltage. This results in
increased potential barrier at the junction. Hence, the junction resistance becomes very high
and as a result practically no current flows through the circuit. However, a very small current
of the order of μA, flows through the circuit in practice. This is knows as reverse saturation
current and it is due to the minority carriers in the junction.
 Fig. 4.6 VI characteristics of PN Diode

Applications of PN junction Diode:

The P-N junction diode has many applications.

• P-N junction diode in reverse biased configuration is sensitive to light from a range
between 400nm to 1000nm, which includes VISIBLE light. Therefore, it can be used as a
photodiode.
• It can also be used as a solar cell.
• P-N junction forward bias condition is used in all LED lighting applications.
• The voltage across the P-N junction biased is used to create Temperature Sensors, and
Reference voltages.
• It is used in many circuits‟ rectifiers, varactor for voltage controlled oscillators.

4.2.ZENER DIODE:

A zener diode is a special type of device designed to operate in the zener breakdown region
which is heavily doped than the normal PN junction diode. Hence, it has very thin depletion
region. Therefore, Zener diode allow more electric current than the normal PN junction
diodes under forward bias like a normal diode but also allows electric current in the reverse
direction if the applied reverse voltage is greater than the zener voltage. Thus they are always
connected in reverse direction because it is specifically designed to work in reverse direction.
The breakdown voltage of a Zener diode is carefully set by controlling the doping level during
manufacture. The name Zener diode was named after the American physicist Clarance Melvin
Zener who discovered the zener effect.

Diode symbol

Breakdown in Zener diode

There are two types of reverse breakdown regions in a Zener diode: Avalanche breakdown
and Zener breakdown.

Avalanche breakdown
The avalanche breakdown occurs at high reverse voltage. When high reverse voltage is
applied to the diode, the free electrons gains large amount of energy and accelerated to greater
velocities. The free electrons moving at high speed will collides with the atoms and knock off
more electrons. These electrons are again accelerated and collide with other atoms. Because of
this continuous collision with the atoms, a large number of free electrons are generated. This
cumulative process is referred to as avalanche multiplication which results in the flow of
large reverse current and this breakdown of the diode is called avalanche breakdown.
Avalanche breakdown occurs in zener diodes with zener voltage greater than 6V.

Zener breakdown:
The zener breakdown occurs in heavily doped diodes because of their narrow depletion
region. When reverse biased voltage applied to the diode is increased, the narrow depletion
region generates strong electric field. When it reaches close to zener voltage, the electric field
in the depletion region is strong enough to pull electrons from their valence band. The valence
electrons which gains sufficient energy from the strong electric field of depletion region will
breaks bonding with the parent atom. The valance electrons which break bonding with parent
atom will become free electrons. This free electrons results in large electric current, a small
increase in voltage will rapidly increases the electric current. This breakdown is referred to as
Zener breakdown.
Note:
 Zener breakdown occurs at low reverse voltage whereas avalanche breakdownoccurs at
high reverse voltage.
 Zener breakdown occurs in Zener diodes because they have very thin depletion
region.
 Breakdown region is the normal operating region for a zener diode.
 Zener breakdown occurs in Zener diodes with Zener voltage less than 6V.
ZENER DIODE CHARACTERISTICS:

When a Zener diode is biased in the forward direction it behaves just like a normal PN
junction diode.
Under reverse-biased condition, the reverse voltage is applied. As the reverse bias voltage is
increased, breakdown of the junction occurs. The breakdown voltage depends upon the amount
of doping. If the diode is heavily doped, depletion layer will be thin and consequently,
breakdown occurs at lower reverse voltage and further, the breakdown voltage is sharp. A
lightly doped diode has a higher breakdown voltage. Thus breakdown voltage can be selected
with the amount of doping .This breakdown voltage point is called the "Zener voltage or
breakdown voltage " and a large amount of current flows throughthe Zener diodes. This Zener
breakdown voltage on the I-V curve is almost a vertical straight line.
 Fig. 4.7 VI characteristics of Zener diode ZENER DIODE AS A VOLTAGE

REGULATOR

From the Zener Characteristics shown, under reverse bias condition, the voltage across
the diode remains constant although the current through the diode increases as shown. Thus
the voltage across the zener diode serves as a reference voltage. Hence the diode canbe used as
a voltage regulator.

Fig. 4.8 Voltage regulator

It is required to provide constant voltage across load resistance RL , whereas the input voltage
may be varying over a range. As shown, Zener diode is reverse biased and as long as the input
voltage does not fall below Zener breakdown voltage, the voltage across the diode will be
constant and hence the load voltage will also be constant.

4.3 BIPOLAR JUNCTION TRANSISTOR INTRODUCTION

The transistor was developed by Dr. Shockley along with Bell Laboratories team in 1951. It is
a three terminal device whose output current, voltage and power are controlled by its input
current. In communication systems it is the primary component in the amplifier. The important
property of the transistor is that it can raise the strength of a weak signal. This property is called
amplification. Transistors are used in digital computers, satellites, mobile phones and other
communication systems, control systems etc., A transistor consists of two P-N junction. The
junction are formed by sand witching either p-type or n- type semiconductor layers between a
pair of opposite types which is shown below

Fig. 4.9 Transistor

TRANSISTOR CONSTRUCTION:

A transistor has three regions known as emitter, base and collector.

Emitter:
 It is a region situated in one side of a transistor, which supplies charge carriers (ie.,
electrons and holes) to the other two regions
 Emitter is heavily doped region
Base:
 It is the middle region that forms two P-N junction in thetransistor
 The base of the transistor is thin as compared to the emitter and is a lightly doped
region
Collector:
 It is a region situated in the other side of a transistor (ie., side opposite to the
emitter) which collects the charge carriers.
 The collector of the transistor is always larger than the emitter and base of atransistor
 The doping level of the collector is intermediate between the heavy doping of
emitter and the light doping of the base.

TRANSISTOR SYMBOLS

NPN Transistor PNP transistor

Fig. 4.10 Transistor

 The transistor symbol carries an arrow head in the emitter pointing from the P-
 region towards the N- region
 The arrow head indicates the direction of a conventional current flow in atransistor.
 The direction of arrow heads at the emitter in NPN and PNP transistor is oppositeto
each other.
 The PNP transistor is a complement of the NPN transistor.
 In NPN transistor the majority carriers are free electrons, while in PNP transistorthese
are the holes.

UNBIASED TRANSISTORS

A transistor with three terminals (Emitter, Base, Collector) left open is called an
unbiased transistor or an open – circuited transistor. The diffusion of free electrons across the
junction produces two depletion layers. The barrier potential of three layers is approximately
0.7v for silicon transistor and 0.3v for germanium transistor. Since the regions have different
doping levels therefore the layers do not have the same width. The emitter base depletion layer
penetrates slightly into the emitter as it is a heavily doped region where as it penetrates deeply
into the base as it is a lightly doped region. Similarly the collector- base depletion layer
penetrates more into the base region and less into the collector region. The emitter- base
depletion layer width is smaller than that of collector base depletion layer. The unbiased
transistor is never used in actual practice. Because of this we went for transistor biasing.

OPERATION OF NPN TRANSISTOR

Fig. 4.11 NPN Transistor

 The NPN transistor is biased in forward active mode ie., emitter – base of transistor is
forward biased and collector base junction is reverse biased
 The emitter – base junction is forward biased only if V is greater than barrier potential
which is 0.7v for silicon and 0.3v for germanium transistor
 The forward bias on the emitter- base junction causes the free electrons in the N – type
emitter to flow towards the base region. This constitutes the emitter current (IE).
Direction of conventional current is opposite to the flow of electrons.
 Electrons after reaching the base region tend to combine with the holes.
 If these free electrons combine with holes in the base, they constitute base current (IB).
 Most of the free electrons do not combine with the holes in the base.
 This is because of the fact that the base and the width is made extremely small and
electrons do not get sufficient holes for recombination.
  Thus most of the electrons will diffuse to the collector region and constitutes collector
current (IC). This collector current is also called injected current, because of this current
is produced due to electrons injected from the emitter region
 There is another component of collector current due to the thermal generated carriers.
 This is called as reverse saturation current and is quite small.

OPERATION OF PNP TRANSISTOR

Fig. 4.12 PNP Transistor

 Operation of a PNP transistor is similar to npn transistor

 The current within the PNP transistor is due to the movement of holes where as, inan
NPN transistor it is due to the movement of free electrons
 In PNP transistor, its emitter – base junction is forward biased and collector base
junction is reverse biased.
 The forward bias on the emitter – base junction causes the holes in the emitter
region to flow towards the base region
 This constitutes the emitter current (IE ).
 The holes after reaching the base region combine with the electrons in the base and
constitute base current (IB).
 Most of the holes do not combine with the electrons in the base region
 This is due to the fact that base width is made extremely small, and holes does not get
sufficient electrons for recombination.
 Thus most of the holes diffuse to the collector region and constitutes collector
current (IC).
 This current is called injected current, because it is produced due to the holes
injected from the emitter region
 There is small component of collector current due to the thermally generated
carriers
 This is also called as reverse saturation current.

TRANSISTOR CONFIGURATIONS

 A transistor is a three terminal device, but we require four terminals (two for input
and two for output) for connecting it in a circuit.
 Hence one of the terminal is made common to the input and output circuits.
 The common terminal is grounded.
  There are three types of configuration for the operation of a transistor.

Common base configuration

This is also called grounded base configuration

In this configuration emitter is the input terminal, collector is the
output terminal and base is the common terminal
Common emitter configuration(CE)

 This is also called grounded emitter configuration

 In this configuration base is the input terminal, collector is the output
terminal and emitter is the common terminal

Common collector configuration(CC)

 This is also called grounded collector configuration

 In this configuration, base is the input terminal, emitter is the output
terminal and collector is the common terminal.

COMMON BASE CONFIGURATION (CB)

Fig. 4.13 CB Configuration

 The input is connected between emitter and base and output is connected
across collector and base
 The emitter – base junction is forward biased and collector – base
junction is reverse biased.
 The emitter current, flows in the input circuit and the collector current flows
in the output circuit.
 The ratio of the collector current to the emitter current is called current
amplification factor.

CHARACTERISTICS OF CB CONFIGURATION

 The performance of transistors determined from their characteristic curvesthat

relate different d.c currents and voltages of a transistor
 Such curves are known as static characteristics curves There are two
important characteristics of a transistor

 Input characteristics
 Output characteristics
The pinch off voltage is the value of VDS at which the drain current reaches its constant saturation
value. Any further increase in VDS does not have any effect on the value of ID.

4.5 METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)

MOSFET stands for metal oxide semiconductor field effect transistor which is widely used
for switching and amplifying electronic signals in the electronic devices. It is capable of
voltage gain and signal power gain. The MOSFET is a core of integrated circuit and it can be
designed and fabricated in a single chip because of these very small sizes.
The MOSFET is a four terminal device with source(S), gate (G), drain (D) and body
(B) or substrate terminals. The body of the MOSFET is frequently connected to the source
terminal so making it a three terminal device like field effect transistor. The MOSFET is very
far the most common transistor and can be used in both analog and digital circuits.
The drain and source terminals are connected to the heavily doped regions. The gate
terminal is connected top on the oxide layer.The metal of the gate terminal and the
semiconductor acts the parallel and the oxide layer acts as insulator of the state MOS
capacitor. Between the drain and source terminal inversion layer is formed and due to the flow
of carriers in it, the current flows in MOSFET the inversion layer is properties are controlled
by gate voltage. Thus it is a voltage controlled device.

Fig. 4.28 MOSFET

Fig. 4.29 Types of MOSFET

TYPES OF MOSFET

 Depletion type MOSFET

 Depletion mode – Negative Gate - Source Voltage (VGS) is applied
 Enhancement mode – Positive Gate - Source Voltage (VGS) isapplied.
 Enhancement type MOSFET

Depletion Type MOSFET:

When there is zero voltage on the gate terminal, the channel shows its maximum conductance.
As the voltage on the gate is negative or positive, then decreases the channelconductivity.

Fig. 4.30 Construction of Depletion Type MOSFET & Symbols

 The Drain (D) and source (S) leads connect to the n – doped regions
 The n doped regions are connected by an N – Channel
 This N-Channel is connected to the Gate (G) through a thin insulating layer of SiO2.
 The n-doped material lies on a p-doped substrate that may have an additional
terminal connection called SS.

Enhancement type MOSFET:

When there is no voltage on the gate terminal the device does not conduct. More voltage
applied on the gate terminal, the device has good conductivity.

Fig. 4.31Construction of Enhancement Type of MOSFET & Symbols

  The Enhancement type MOSFET is equivalent to “Normally Open” switch and these
types of transistors require gate-source voltage to switch ON the device.
 The broken line is connected between the source and drain which represents the
enhancement type. In enhancement type MOSFETs the conductivity increases by
increasing the oxide layer which adds the carriers to the channel.
 Generally, this oxide layer is called as „Inversion layer‟. The channel is formed
between the drain and source in theopposite type to the substrate, such as N-channel is
made with a P-type substrate and P-channel is made with an N-type substrate. The
conductivity of the channel due to electrons or holes depends on N-type or P- type
channel respectively.

WORKING OF DEPLETION TYPE MOSFET:

Fig. 4.32 Construction of Enhancement Type of MOSFET & Symbols

Working of Depletion Type MOSFET

The gate-to-source voltage is set to zero volts by the direct connection from one terminal to the
other and a voltage VDS is applied across the drain to source terminals. The result is an
attraction for the positive potential at the drain by the free electrons of the n-channel and a
current similar to that established through the channel of the JFET. In fact, the resulting current
with VGS = 0 V continues to be labeled IDSS, as shown in the characteristics of depletion
type MOSFET in the below figure.

VGS has been set at a negative voltage such as 1 V. The negative potential at the gate
will tend to pressure electrons toward the p-type substrate (like charges repel) and attract holes
from the p-type substrate (opposite charges attract) as shown in the above figure
 Fig. 4.33 Drain and Transfer Characteristics of Depletion type MOSFET

Depending on the magnitude of the negative bias established by VGS, a level of

recombination between electrons and holes will occur that will reduce the number of free
electrons in the n-channel available for conduction. The more negative the bias, the higher the
rate of recombination. The resulting level of drain current is therefore reduced with increasing
negative bias for VGS as shown in the figure below for VGS = - 1 V, - 2 V, and so on, to the
pinch-off level of 6 V. The resulting levels of drain current and the plotting ofthe transfer curve
proceeds exactly as described for the JFET.

Fig. 4.34 Depletion type MOSFET

For positive values of VGS, the positive gate will draw additional electrons (free carriers) from
the p-type substrate due to the reverse leakage current and establish new carriers through the
collisions resulting between accelerating particles. As the gate to source voltage continues to
increase in the positive direction, characteristics of depletion type MOSFET reveals that the
drain current will increase at a rapid rate for the reasons listed above.

The vertical spacing between the VGS = 0 V and VGS = 1 V curves in the characteristic
curve is a clear indication of how much the current has increased for the 1- V change in VGS.
Due to the rapid rise, the user must be aware of the maximum drain
current rating since it could be exceeded with a positive gate voltage. That is, for the device of
figure showing characteristics of depletion type MOSFET, the application of a voltage VGS =
4 V would result in a drain current of
mA, which could possibly exceed the maximum rating (current or power) for the device.
As revealed above, the application of a positive gate-to-source voltage has “enhanced” the
level of free carriers in the channel compared to that encountered with VGS = 0 V. For this
reason the region of positive gate voltages on the drain or transfer characteristics is often
referred to as the enhancement region, with the region between cutoff and the saturation level
of IDSS referred to as the depletion region.

WORKING OF ENHANCEMENT TYPE MOSFET(EMOSFET):

Fig. 4.35 Operation of Enhancement type MOSFET

Working of an EMOSFET

As its name indicates, this MOSFET operates only in the enhancement mode and has no
depletion mode. It operates with large positive gate voltage only. It does not conduct when the
gate-source voltage VGS = 0. This is the reason that it is called normally-off MOSFET. In these
MOSFET’s drain current ID flows only when VGS exceeds VGST [gate-to- source
threshold voltage].

When drain is applied with positive voltage with respect to source and no potential is applied
to the gate two N-regions and one P-substrate from two P-N junctions connected back to back
with a resistance of the P-substrate. So a very small drain current that is, reverse leakage
current flows. If the P-type substrate is now connected to the source terminal, there is zero
voltage across the source substrate junction, and the–drain- substrate junction remains reverse
biased.

When the gate is made positive with respect to the source and the substrate, negative (i.e.
minority) charge carriers within the substrate are attracted to the positive gate and accumulate
close to the-surface of the substrate. As the gate voltage is increased, more and more electrons
accumulate under the gate. Since these electrons can not flow across the insulated layer of
silicon dioxide to the gate, so they accumulate at the surface of the substrate just below the
gate. These accumulated minority charge carriers N -type channel
stretching from drain to source. When this occurs, a channel is induced by forming what is
termed an inversion layer (N-type). Now a drain current start flowing. The strength of the
drain current depends upon the channel resistance which, in turn, depends upon the number of
charge carriers attracted to the positive gate. Thus drain current is controlled by the gate
potential.

Since the conductivity of the channel is enhanced by the positive bias on the gate so this
device is also called the enhancement MOSFET or E- MOSFET.

The minimum value of gate-to-source voltage VGS that is required to form the inversion layer
(N-type) is termed the gate-to- source threshold voltage VGST. For VGS below VGST,the drain
current ID = 0. But for VGS exceeding VGST an N-type inversion layer connects the source to
drain and the drain current ID is large. Depending upon the device being used, VGSTmay vary
from less than 1 V to more than 5 V.
JFETs and DE-MOSFETs are classified as the depletion-mode devices because their
conductivity depends on the action of depletion layers. E-MOSFET is classified as an
enhancement-mode device because its conductivity depends on the action of the inversion
layer. Depletion-mode devices are normally ON when the gate-source voltage VGS = 0,
whereas the enhancement-mode devices are normally OFF when VGS = 0.

CHARACTERISTICS OF AN EMOSFET.

Fig. 4.36 Characteristics of Enhancement type MOSFET Drain

Characteristics-EMOSFET

Drain characteristics of an N-channel E-MOSFET are shown in the above figure. The lowest
curve is the VGST curve. When VGS is lesser than VGST, ID is approximately zero. When VGS
is greater than VGST, the device turns- on and the drain current ID is controlled by the gate
voltage. The characteristic curves have almost vertical and almost horizontal parts. The almost
vertical components of the curves correspond to the ohmic region, and the horizontal
components correspond to the constant current region. Thus E-MOSFET can be operated in
either of these regions i.e. it can be used as a variable- voltage resistor (WR) or as a constant
current source.
 EMOSFET-Transfer Characteristics
The current IDSS at VGS <=0 is very small, being of the order of a few nano-amperes. When
the VGS is made positive, the drain current ID increases slowly at first, and then much more
rapidly with an increase in VGS. The equation for the transfer characteristic does not obey
equation. However it does follow a similar “square law type” of relationship. The equation for
the transfer characteristic of E-MOSFETs is given as: ID=K(VGS-VGST)2

Fig. 4.37 Transfer Characteristics of Enhancement type MOSFET

Handling Precautions for MOSFET

The MOSFET has the drawback of being very susceptible to overload voltage and may
require special handling during installation. The MOSFET gets damaged easily if it is not
properly handled. A very thin layer of SiO2, between the gate and channel is damaged due to
high voltage and even by static electricity. The static electricity may result from the sliding of a
device in a plastic bag. If a person picks up the transistor by its case and brushes the gate against
some grounded objects, a large electrostatic discharge may result. In a relatively dry
atmosphere, a static potential of 300V is not uncommon on a person who has high resistance
soles on his footwear.
MOSFETs are protected by a shorting ring that is wrapped around all four terminals during
shipping and must remain in place until after the devices soldered in position. prior to soldering
,the technician should use a shorting strap to discharge his static electricity and make sure that
the tip of the soldering iron is grounded. Once in circuit, there are usually low resistances
present to prevent any excessive accumulation of electro static charge .However, the MOSFET
should never be inserted into or removed from a circuit with the power ON.JFET is not subject
to these restrictions, and even some MOSFETs have a built in gate protection known as
“integral gate protection”, a system built into the device to get around the problem of high
voltage on the gate causing a puncturing of the oxide layer. The manner in which this is done
is shown in the cross sectional view of Fig.7.11.The symbol clearly shows that between each
and the source is placed a back-to- back (or front-to-front) pair of diodes, which are built right
into P type substrate.