Surman Journal for Science and Technology [Link].

ly
Vol.02, No.3, Dec 2020, pp. 032 ~ 046 ‫مجلة صرمان للعلوم والتقنية‬

DESIGN A MICRO-OHMMETER FOR MEASURING VERY

SMALL RESISTANCE
Abdulstar Ali Alkout1, Albasher Mostafa Ahmed2, Ali Mustafa Madi3
Om Alrabee Faculty of Science and Technology
Alkout31@[Link].ly1,m.bash22@[Link].ly2,amadi@[Link].ly3

Abstract
In our paper the micro-ohmmeter in This circuit will be used for measuring very
small resistances without applying large currents. The mili-voltage value will be
used in this paper as well. Anyway, the Achievement of the circuit consists of
two parts, simulation by software, and hardware. This paper is going to describe
all steps one by one with calculation, simulation and hardware results.
Introduction
In this circuit, we are going to design a micro-ohmmeter that could be
measure low amplified by an amplifier then rectified using rectification circuit.
This circuit can be used to track shorting in printed circuit boards without
affecting the sensitive components on it. The circuit consists of six main parts
which are: (source, Kelvin probes, Differential Amplifier, Phase sensitive
detector (PSD),Voltage-Controlled Oscillator (VCO), Muting Detector
(Comparator)).We are going to explain all parts and the function of them in this
report.
The aim of this experiment :-
• Design and test a lock-in Amplifier based micro-ohmmeter.
• Extraction of resistance measurement via the 4WKP, in order to filter
inaccuracies.
• Understand the concept of IA in order to assure reasonable rejection and high
common-mode range.

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• Achievement of 1.1 KHz oscillation from the Source (i.e., oscillator,

Quadrature & Attenuator) in terms of peak-to-peak form of less than 200mV.
• Achieve and output of a waveform around 10 KHz, in terms of audible signals
from the microphone.
System Block Diagram

Figure (1) Block diagram of the instrument design

Source
The source consists of (Oscillator), (Quadrature Divider) and (Balanced
Attenuator) as Shown in figure (2). [5]
6

U2:A
5 1
S

D Q
3 J2
CLK
1
2 2
90
Q 270
R

R2 3
0 deg
1M0 4013 4
U1 180
4
8

555 REF
4 3
VCC

R Q
7
DC
5
R3
CV

R1 J4
GND

2 6 1k0 1
TR TH
R5 2
8

U2:B 3
1

9 13 4
S

D Q
11 Probes
CLK
R4
12
Q
R

C2 C3
1n0 10n 4013
10

(Figure 2 Oscillator, Quadrature Divider and Attenuator circuit)

- Oscillator

An oscillator is an electronic circuit that produces a repetitive electronic signal,

often a sine wave. Oscillators designed to produce a high-power AC output from

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a DC supply are usually called inverter. There are many types of electronic
oscillator; One of them the 555 Timer IC can be connected in its Monostable
mode thereby producing a precision timer of a fixed time duration, or in its
Bistable method to yield a Flip-flop type switching action [2]. The connections
for astable or free-running operation. Together the trigger& threshold inputs are
linked directly to the capacitor. Also there is an Extra resistor, R 1, connected
between the capacitor and the discharge transistor to slow the discharge.

(Figure 3 The basic 555 timer diagram)

The beginning of the source which generates 1.1KHz frequency, at this
frequency R2 equals 130K, the end result of output of oscillator as shown in
figure (4,5). Controlling the charging time (controlling the frequency) via R 1 and
R2. Regulatory the discharging time via R1. After this comes the stage of
Quadrature Divider.
The total period is the sum of the charge and discharge time t
T = 0.693(R2 + 2R1) C.
1 1
AT  U 1  F = = = 0.004  106 = 4 KHZ
T 250m
Thigh=0.693*C3*(R1*R2)
Tlow=0.693*C3*R1

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Period=Thigh+Tlow=0.693*C3*(R2+2R2)
1 1.443
F= =
T C3 × (R 2 + 2R1 )
1.443
1.1 khz = ⟹ R 2 = 129.2 kΩ ≈ 130 kΩ
10 × 10−9 × (2 ∗ 1kΩ + R 2 )

(Figure 4 Real Oscillator Circuit Test Result) (Figure 5 The output of the
Oscillator)
- Quadrature Divider
The Quadrature Divider as its name denotes to dividing by four, here it does
divide the frequency of 4KHz by four resulting in a frequency of about 1KHz.
The Balanced PI type Attenuator technically reduces the amplitude of the voltage
by a fraction which is really determined with the R5 value (Note: Voltage divider
theorem and that resistance is in direct proportion with Voltage) prior to the
signal getting to J4.

1 1
AT  U 2 : A, B  F = = −6
= 1  103 = 1KHZ
T 1000  10

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(Figure 6 Quadrature divider output with different phases)

(Figure 7 Quadrature divider output(at 0 0 and 180 0)) (Figure 8 Quadrature divider output(at 90 0 and 270))

U1 U2,A U2,B
voltage frequency voltage Frequency Voltage frequency
6.16 AC 1.025 HZ 4.88 AC 257.1HZ 6.40 AC 257.1HZ
- Balanced Attenuator

An attenuator is an electronic expedient that reduces the amplitude or

-
power of a signal without noticeably distorting its waveform. An attenuator is
effectively the opposite of an amplifier, though the two work by different
methods. While an amplifier offers gain, an attenuator provides loss, or gain less
than [Link] are usually passive devices made from simple voltage divider
networks. Switching between different resistances forms adjustable stepped
attenuators and continuously regulating ones using potentiometers.

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The output signal should have peak-to-peak amplitude of not as much of 400mV.
Together these values have a +/- 5% tolerance. The waveform frequency about
1.1 kHz. Then in this step the voltage will be reduced from 6V to 400mv peak to
peak at which the value of R5 (75) was obtained by using Thevenin's theorem as
shown below, The higher value of RL the higher the voltage across it

Vout = Vin *R5/(R3+R4+R5)

200mv = 6 R5/(1.1K+1.1K+R5) R5 = 75.86 Ω
Recalculate when the vin 4.88
Vout = Vin * R5/(R3+R4+R5)
200mv = 4.88 * R5/(1.1K+1.1K+R5) R5 = 94 Ω
Calculate the (rather small) voltage we measured when a 1mΩ resistor is
connected across R5
Vout = Vin *((R5*RL/R5+RL)/R3+R4+(R5*RL/R5+RL))
0.00099
Vout = 4.88 ∗ Vout = 2.22µv
1.1k+1.1k+0.00099

Aftar that we are going to calculate the voltage corresponding to 0.22, which the
maximum resistance this device is intended.
Vout = Vin * RL/(R3+R4+RL) Vout = 0.000485v

We used 0.22Ω resistor as a load resistor so we've got 0.485mv voltage source
at point J4 as required.
Differential Amplifier
An instrumentation amplifier is a gentle of differential amplifier that has
been outfitted with input buffers, which eliminate the requirement for input
impedance matching and thus make the amplifier particularly suitable for use in
measurement and test equipment. Additional characteristics include very low DC
offset, low drift, low noise, very high open-loop gain, very high common-mode

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rejection ratio, and very high input impedances [4]. Instrumentation amplifiers
are used where excessive correctness and stability of the circuit both short- and
long-term are essential. As the voltage value across the amplifier must be
200mV, will be easy to find by calculation that this value is 10 times greater . we
can see the result of the calculate

Vout 2𝑅1
R9= (V2+V1)
= (1 + 𝑅𝑔𝑎𝑖𝑛) ∗ 𝑅3
𝑅2

2.4 2∗10000
= 1+( ) ∗ 100
10
0.000446∗2 𝑅𝑔𝑎𝑖𝑛

So R9=81KΩ
After the calculate R9, so we used R9=81kΩ, in this time we found the gain is
inversely proportion to R9

The question that we should think about is, Why we have distributed the gain,
rather than using U3 to supply all the gain? Are there any disadvantages to doing
this?

Because the value of the first stage is smaller than the next, otherwise we
multiply the gain in ten times to get the good output. In the Figure below we can
see the Real amplifier Circuit Test Result at J5&J6 with J3 .Moreover, we can see
the gain of the differential stage it well be 10 rather than the normal 1, this is
because

R 19
=
100K
= 10 , also as the end result the ratio of the
R 17
10K

resistances is 10 as well as the gain is 10 time.

R12 is different from the stated value by 1%. There is no effect at the output
signal.

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Any of R15, 16, 17, 19 are different from the stated value by 1%. The gain could
increase & amplify by increasing or decreasing the value of any one of these
resisters

(Figure 9 Real amplifier Circuit Test Result at J5&J6 with J3)

Phase sensitive detector (PSD)

This device is responsible for the rectification process where the amplified AC
signal get rectified to a DC signal. Further the rectification process a DC signal
is obtained but with unwanted ripples as it shown in figure 8 which was denoted
via pin J8 & 11. Bear in mind this is the second stage of amplification therefore
it will be amplified by a gain of ten has been worked out. The components of the
PSD are phase reversing switches which technical works using zero crossing
reference, which makes the signal in the required manner. As the final outcome
is required to be fully rectified which is can bee seen in figure (9), for this reason
even numbers of switches are responsible for this task.
𝑉𝑃𝑆𝐷 = 𝑉𝑆𝐼𝐺 𝑉𝐿 sin(𝜔𝑟 𝑡 + 𝜃𝑠𝑖𝑔 ) sin (𝜔𝐿 𝑡 + 𝜃𝑟𝑒𝑓 )

In practice and simple words the PSD also ensures that the wanted signal
is processed with elimination of unwanted signals, and the PSD becomes unique
when it carries out the filtration of a signal of predetermined reference such as
frequency and this cannot be obtain with alternatives technique of PSD such as

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Diodes. Emphasizing the location of the PSD to be between the two op-amps and
the third is to remove the spikes with the DC signal which are a result of C 7.
In this circuit the phase reversing switch is located in the middle of the two op-
amps and their third companion which results in the PSD, this is so in order to
neglect switching spikes which are caused of released charges (C7 duty).
J8
TP4

J8
C8 TP4

1n0
R19 C8

U4 100k
R11 12 14
R17 10k 2
1n0
A X0 X
100
13
X1
1 R19
R13 15 3
Y
2 U5:A 100k
B
R11 1
Y0
4 U4
R16 10k R17 10k
100 Y1 Z MC33172P
12 14 2
A X0 X
5 13 1
100 Z0 X1
R13 3
Z1 R15
Y
15
J11 3
B J7 2
Y0
100k C7 U5:A
11 TP7
R16 10k
A 1 4
1n0
100 10 Y1 Z MC33172P
B
9
C 5
Sync 6 Z0
INH
R18 3
Z1 Vg (2.5V)
R15 J11
J7 100k 4053 100k C7
VEE=GND 11 TP7
A 1n0
10
B
9
C
Sync 6
INH
R18 Vg (2.5V)
100k 4053
VEE=GND

(Figure 10 circuit of Phase sensitive detector)

The Synchronous Switch

This is the core of the whole design. The aim is fairly easy, but designing a phase-
reversing switch which does not inject not needed voltage spikes into the signal
is surprisingly difficult. The main problem is that, to switch quickly and
completely, the switching signal voltage is often quite large and has sharp
transitions (SIMON BATESON).
A synchronous switch for rectified alternating circuits, the function of
which be automatically synchronized on the crossing to zero of the load voltages
at its terminals. This synchronous switch contains essentially a semi-conductor
element selected from thyristors of a particular kind and possibly a diode. The
semiconductor component comprises two essentials electrodes and a control

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electrode. This part can only be triggered at times when the polarity of the control
voltage at the gate is the reverse of that of the first main electrode, and once
triggered it after that remains blocked until the load current crossing it is reduced
to zero. To provide an alternating current switch, the main electrodes might be
linked to a rectifier bridge, and it may also be connected across a diode, and the
devices thus formed can be used to interrupt each phase of a poly phase load
current. In the Figure (11) it can be clearly seen the Synchronous Switch circuits.

Figure 11 The Synchronous Switch circuits

Output Reference – Ground 3V

The major purpose of having this circuit is to create a platform for
referencing the DC voltage signals by the LPF, rectifier, and the VCO.
Technically here C12 capacitance is kept inaccessible by R32, which in a sense
makes the virtual ground reference. Looking up this section of the circuit
concludes that it is potential divider theorem to be used to work out R 31, and as
can be seen R32 & R33 are identical hence virtual ground voltage is V3.

R2(1)
R1(1)
AMP=2.2
R2
FREQ=10k
1k0
OFFSET=2.5
PHASE=0
THETA=0 M1 R1 *SCRIPT SPICE
PMOSFET .MODEL QNMOS NMOS(LEVEL=1 VTO=1.44 K
10k
+ GAMMA=0 PHI=.6 LAMBDA=10m RD=23.2 R
+ CBS=2.0p CGSO=0.1p CGDO=0.1p PB=.8 TO

FREQ=1000 U1 .MODEL QPMOS PMOS(LEVEL=1 VTO=-1.2 K

PW=50% INVERTER + GAMMA=0 PHI=.6 LAMBDA=40m RD=21.2 R
U1(D)
TD=0 + CBS=4.0p CGSO=0.2p CGDO=0.2p PB=.8 TO
+2.5V
TF=0 *ENDSCRIPT
TR=0
V1=0 M2
V2=5 NMOSFET
These values obtained from CD4007 sp

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R32
J13 100k U6:B
C1

8
MC33172P VG
2 C4
1 5 R31
0u1 7
5V 10u 6 10

C11 R33 C12

4
1n0 100k 1uF

Figure (12) wiring diagram of Reference Ground

Sallen-Key Equal Value low pass Filter

The signal which is the input to the LPF carries some noise and it’s been passed
through this filter in order to achieve a clean DC signal which is noiseless at J8,
It couldn’t be clearly smooth but contains glitches due to phase lags introduced
in the differential amplifier stage. It will be contains noise, in the form of mains
pickup, thermal noise and DC offset. To average all of these disturbances, we
need a low pass filter to eliminate the ripples. The purposes of the low pass filter
in this circuit to eliminate the ripples and just pass low frequency because the
output DC of the amplifier was had ripples and this Undesirable so the output of
the low pass filter will be pure and steady DC. When we measured between J 9
and J11 &R load=0.22ohm we obtained pure and steady DC ≈1.3V as shown in
figure(14) and as input to Voltage-Controlled Oscillator (VCO) and we designed
R20 and R22 as following:

1
𝑓=
2𝜋𝑅𝐶

1 1
𝑅 = 2𝜋𝐹𝐶 = 2∗5∗0.1∗10−6 𝑅 = 322.3 𝑅22 = 𝑅20 = 330

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(Figure 13 Real LPF Circuit Test Result at J9 with J11&R load=0.22ohm)

Voltage-Controlled Oscillator (VCO)

In the this part of the design .A voltage-controlled oscillator (VCO) provides a
periodic signal, more fore, is an electronic oscillator designed to be controlled in
oscillation frequency according to the voltage input, the frequency could be
changed by a variable (DC) control voltage at last the output from the
comparator is further processed in the VCO, at this step the VCO implements the
output from the comparator in an oscillating periodic signal form where the
frequency of the produced signal is in comparison to the input feed into the VCO
which denotes to range of the resistance to be measured in a range manner .[6]
The system used in this part is the potential divider method where the DC output
from the PSD and comparator in return switches the VCO to on status till the DC
output from PSD circuit is under the reference voltage which is originally set up
by the potential divider technique we can see the circuit of Controlled Oscillator
(VCO) in figure (14) and The output of the integrator and comparator stages of
the VCO as shown in figure(16) shows R 38 and (j11) charge and discharge and
(R) load=1o hm and figure(17) shows j 12 with (j11) charge and discharge and r
load = 0.22Ω .

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It is possible to obtained by the following equation:

F0 = V1 / 8RC (Vth – Vth)
4.5−3
𝒰𝑘 = 8∗100𝐾𝐶∗1.5
4.2−2.5
𝐶 = 8∗100𝐾∗𝒰𝑘∗1.5

= 225 𝑝𝑓
, but in practical we used 220pf capacitor which is the closest available in the lap
.

BUZ1
J12(1)
R28 C13 R37 R38
Vvco
200k 100k 1k0 BUZZER

8
SELECT
5
2 7
Vvco 1 6
R29 3
100k U7:B
4

U7:A R36 MC33172P

R30 R27 MC33172P 47k
100k 100k

Q1
BC182L
R26
+2.5V
100k

VG

Figure 14 Voltage-Controlled Oscillator (VCO) Circuit

figure(15)- R38& (j11) charge &dis charge &(R) load figure(16)j12 with (j11) charge &discharge
&(R) load

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Muting Detector (Comparator)

The most important function in this step to mute the buzzer. When the measured
resistor is bigger than 0.22Ω. How this process happens?, The principle of
operation of this circuit depends on the process of Comparator When the
measured resistor become high value, the output voltage of source will be
increase the voltage at J9 becoming greater than the reference voltage 3v a result
of that, the comparator U6:A will produce negative signal , this signal will enable
the diode to pass signal. However, Thus at this voltage the transistor will be
switched off because the transistor base voltage will always be less than the
emitter voltage. So the charging and discharging of the capacitor will not
continue which will mute the sound In the figure (17) below the circuit of the
muting detector
J10
TP8

R25
47k
R23
R24
10k 1M0

D1
3 1N914
1
2
Vvco
R34
SELECT U6:A
MC33172P

Figure (17) muting detector circuit

Vi ∗ R34
𝑉0 =
R24 + R34
6 ∗ R34
4.5 =
10K + R34
R34=30K

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Conclusion
The simulation of the design is achieved by check every signal in the
circuit (inputs and outputs) and the suitable values of the components are selected
which give the desired specification of the design without any cost.
The design is suitable to measure the resistor which has very low resistors
maximum limit (0.22 ohm) . The output frequency is muted by the comparator
circuit when the values of the measured resistors more than 0.22 ohm which it is
the aim of our design.
In An instrumentation amplifier circuit, there is one resistor controlling the value
of gain

Reference
[1]- Dr. Simon.B, School of Science and Technology, University of Teesside
Middlesbrough U.K.
[2]- Jensen, Amanda [Link] University, Pro Quest Dissertations
Publishing, 2019. 13815232
[3]- Horowitz, Paul; Hill, Winfield (2015). The Art of Electronics. USA.
p. 425. ISBN 978-0-521-80926-9.
[4]- The art of electronics (Paul Horowitz) 2nd edition
[5]- [Link] Oscillator-, the free [Link].w
[6]-[Link]/wavefor/[Link]-cached-similar
[7]- [Link]/~kvandervoort/Elec%20Lab%[Link]

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