LTC3026

1.5A Low Input Voltage

VLDO Linear Regulator
Features Description
n Input Voltage Range: The LTC®3026 is a very low dropout (VLDO™) linear regula-
1.14V to 3.5V (with Boost Enabled) tor that can operate at input voltages down to 1.14V. The
1.14V to 5.5V (with External 5V Boost) device is capable of supplying 1.5A of output current with
n Low Dropout Voltage: 100mV at IOUT = 1.5A a typical dropout voltage of only 100mV. To allow opera-
n Adjustable Output Range: 0.4V to 2.6V tion at low input voltages the LTC3026 includes a boost
n Output Current: Up to 1.5A converter that provides the necessary headroom for the
n Excellent Supply Rejection Even Near Dropout internal LDO circuitry.
n Shutdown Disconnects Load from VIN and VBST Output current comes directly from the input supply to
n Low Operating Current: IIN = 950µA at VIN = 1.5V maximize efficiency. The boost converter requires only a
n Low Shutdown Current: small chip inductor and ceramic capacitor for operation.
IIN < 1µA (Typ), IBST = 0.1µA (Typ) Additionally, the boosted output voltage of one LTC3026
n Stable with 10µF or Greater Ceramic Capacitors can supply the boost voltage for other LTC3026s, thus
n Short-Circuit, Reverse Current Protected requiring a single inductor for multiple LDOs. A user
n Overtemperature Protected supplied boost voltage can be used eliminating the need
n Available in 10-Lead MSOP and 10-Lead for an inductor altogether.
(3mm × 3mm) DFN Packages
The LTC3026 regulator is stable with 10µF or greater
Applications ceramic output capacitors. The device has a low 0.4V
reference voltage which is used to program the output
n High Efficiency Linear Regulator voltage via two external resistors. The device also has
n Post Regulator for Switching Supplies internal current limit, overtemperature shutdown, and
n Microprocessor Supply reverse output current protection. The LTC3026 is avail-
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks able in a small 10-lead MSOP or low profile (0.75mm)
and ThinSOT, VLDO are trademarks of Linear Technology Corporation. All other trademarks are
the property of their respective owners. 10-lead 3mm × 3mm DFN package.

Typical Application
1.2V Output Voltage from 1.5V Input Supply Dropout Voltage vs Output Current
150
L1 SW
10µH 5V BOOST BST
CONVERTER
4.7µF
100
DROPOUT (mV)

IN 1.2V
VIN = 1.5V
1.5V
4.7µF
0.4V + 2.0V
2.6V
– OUT VOUT = 1.2V, 50
1.5A
8.06k
ADJ COUT
OFF ON SHDN 10µF

LTC3026 100k 4.02k 0

0 0.5 1.0 1.5
GND PG IOUT (A)
3026 TA01a
3026 TA01b

L1: MURATA LQH2MCN100K02

3026fd


LTC3026
Absolute Maximum Ratings (Note 1)

VBST to GND.................................................. –0.3V to 6V Output Short-Circuit Duration........................... Indefinite

VIN to GND.................................................... –0.3V to 6V Operating Junction Temperature Range
PG to GND.................................................... –0.3V to 6V (Note 8)..............................................–40°C to 125°C
SHDN to GND............................................. –0.3V to 6.3V Storage Temperature Range.................... –65°C to 125°C
ADJ to GND.................................... –0.3V to (VIN + 0.3V) Lead Temperature (MSE, Soldering, 10 sec).......... 300°C

Pin Configuration
TOP VIEW
TOP VIEW
IN 1 10 OUT
IN 1 10 OUT
IN 2 9 OUT IN 2 9 OUT
11 11
GND 3 8 ADJ GND 3 8 ADJ
GND GND
SW 4 7 PG
SW 4 7 PG
BST 5 6 SHDN
BST 5 6 SHDN
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE TJMAX = 125°C, θJA = 40°C/W
10-LEAD (3mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 40°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

order information
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3026EDD#PBF LTC3026EDD#TRPBF LBHW 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3026EMSE#PBF LTC3026EMSE#TRPBF LTBJB 10-Lead Plastic MSOP –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3026EDD LTC3026EDD#TR LBHW 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3026EMSE LTC3026EMSE#TR LTBJB 10-Lead Plastic MSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: [Link]
For more information on tape and reel specifications, go to: [Link]

3026fd


 LTC3026
Electrical Characteristics (BOOST ENABLED, LSW = 10µH)
The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at
TJ = 25°C. VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 4.7µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Operating Voltage (Note 2) l 1.14 3.5 V
IIN Operating Current IOUT = 0mA, VOUT = 0.8V, VSHDN = VIN, VIN = 1.2V 1160 µA
IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 1.5V 950 µA
IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 2.5V 640 µA
IOUT = 0mA, VOUT = 1.2V, VSHDN = VIN, VIN = 3.5V 400 µA
IINSHDN Shutdown Current VSHDN = 0V, VIN = 3.5V l 0.6 20 µA
Inductor Size Requirement 4.7 10 40 µH
Inductor Peak Current Requirement 150 mA
VBST Boost Output Voltage Range VSHDN = VIN 4.8 5 5.2 V
VBSTUVLO Boost Undervoltage Lockout l 4.0 4.2 4.4 V
Boost Output Drive (Note 3) VIN < 1.4V 7 mA
VIN ≥ 1.4V 10 mA

(BOOST DISABLED, VSW = 0V or Floating)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at
TJ = 25°C. VIN = 1.5V, VOUT = 1.2V, VBST = 5V, CIN = CBST = 1µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Operating Voltage (Note 2) l 1.14 5.5 V
IIN Operating Current IOUT = 100µA, VSHDN = VIN, 1.2V ≤ VIN ≤ 5V l 95 200 µA
IINSHDN Shutdown Current VSHDN = 0V, VIN = 3.5V l 0.6 20 µA
VBST Boost Operating Voltage (Note 7) VSHDN = VIN l 4.5 5 5.5 V
VBSTUVLO Undervoltage Lockout l 4.0 4.25 4.4 V
IBST Boost Operating Current IOUT = 100µA, VSHDN = VIN l 175 275 µA
IBSTSHDN Boost Shutdown Current VSHDN = 0V 1 5 µA

(BOOST ENABLED or DISABLED)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at
TJ = 25°C. VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 1µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VADJ Regulation Voltage (Note 5) 1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VIN ≤ 3.5V, VBST = 5V, VOUT = 0.8V 0.397 0.4 0.403 V
1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VIN ≤ 3.5V, VBST = 5V, VOUT = 0.8V l 0.395 0.4 0.405 V
OUT Programming Range l 0.4 2.6 V
Dropout Voltage (Note 6) VIN = 1.5V, VADJ = 0.38, IOUT = 1.5A l 100 250 mV
IADJ ADJ Input Current VADJ = 0.4V l –100 100 nA
IOUT Continuous Output Current VSHDN = VIN l 1.5 A
ILIM Output Current Current Limit 3 A
en Output Voltage Noise f = 10Hz to 100kHz, IL = 800mA
Boost Disabled 110 µVRMS
Boost Enabled 210 µVRMS

3026fd


LTC3026
electrical characteristics (BOOST ENABLED or DISABLED)
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 1µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIHSHDN SHDN Input High Voltage 1.14V ≤ VIN ≤ 3.5V l 1.0 V
3.5V ≤ VIN ≤ 5.5V l 1.2 V
VILSHDN SHDN Input Low Voltage 1.14V ≤ VIN ≤ 5.5V l 0.4 V
IIHSHDN SHDN Input High Current SHDN = VIN –1 1 µA
IILSHDN SHDN Input Low Current SHDN = 0V –1 1 µA
VOLPG PG Output Low Voltage IPG = 2mA l 0.1 0.4 V
IOHPG PG Output High Leakage Current VPG = 5.5V 0.01 1 µA
PG Output Threshold (Note 4) PG High to Low –12 –9 –6 %
PG Low to High –10 –7 –4 %

Note 1: Stresses beyond those listed under Absolute Maximum Ratings operating at maximum input voltage, the output current range must be
may cause permanent damage to the device. Exposure to any Absolute limited. When operating at maximum output current, the input voltage
Maximum Rating condition for extended periods may affect device range must be limited.
reliability and lifetime. This IC has overtemperature protection that is Note 6: Dropout voltage is minimum input to output voltage differential
intended to protect the device during momentary overload conditions. needed to maintain regulation at a specified output current. In dropout, the
Junction temperatures will exceed 125°C when overtemperature is active. output voltage will be equal to VIN – VDROPOUT.
Continuous operation above the specified maximum operating junction Note 7: To maintain correct regulation
temperature may impair device reliability.
VOUT ≤ VBST – 2.4V
Note 2: Minimum Operating Voltage required for regulation is:
Note 8: The LTC3026E is guaranteed to meet performance specifications
VIN ≥ VOUT(MIN) + VDROPOUT
from 0°C to 125°C. Specifications over the –40°C to 125°C operating
Note 3: When using BST to drive loads other than LTC3026s, the load junction temperature range are assured by design, characterization and
must be high impedance during start-up (i.e. prior to PG going high). correlation with statistical process controls. The LTC3026I is guaranteed
Note 4: PG threshold expressed as a percentage difference from the over the full –40°C to 125°C operating junction temperature range.
“VADJ Regulation Voltage” as given in the table. Note that the maximum ambient temperature is determined by specific
Note 5: Operating conditions are limited by maximum junction operating conditions in conjunction with board layout, the rated package
temperature. The regulated output voltage specification will not apply thermal resistance and other environmental factors.
for all possible combinations of input voltage and output current. When

typical performance characteristics

IN Supply Current with Boost BST Supply Current with Boost IN Supply Current with Boost
Converter Enabled Converter Disabled Converter Disabled
1.50 200 200

1.25
150 150
INPUT CURRENT (mA)

1.00
IBST (µA)

IIN (µA)

0.75 100 100

0.50 VBST = 5V VBST = 5V

50 –40°C 50 –40°C
–40°C 25°C 25°C
0.25
25°C 85°C 85°C
85°C 125°C 125°C
0 0 0
1.0 1.5 2.0 2.5 3.0 3.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN (V) VIN (V) VIN (V)
3026 G01 3026 G02 3026 G03

3026fd


 LTC3026
Typical Performance Characteristics

ADJ Voltage vs Temperature IN Shutdown Current BST Voltage vs Temperature

404 5.0 5.050
VIN = 1.5V
4.5
403
4.0
402 5.025
ADJUST VOLTAGE (mV)

3.5

INPUT CURRENT (µA)

BST VOLTAGE (V)

401 3.0
1mA
400 2.5 5.000
1.5A 2.0
399
3.5V
1.5
398 4.975
VBST = 5V 1.0
397 VIN = 1.5V 2.5V
0.5
VOUT =1.2V 1.2V
396 0 4.950
–50 –25 0 25 50
75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3026 G04 3026 G05 3026 G06

Dropout Voltage vs Input Voltage Ripple Rejection Ripple Rejection

200 60 70
VFB = 0.38V
180 IOUT =1.5A 10kHz
50 60
160
1MHz

RIPPLE REJECTION (dB)

RIPPLE REJECTION (dB)

140 50
40
DROPOUT (mV)

120 100kHz
40
100 30
80 30

60 20
20 VBST = 5V
–40°C VBST = 5V VIN = 1.5V
40 25°C VOUT =1.2V
10 VOUT =1.2V
85°C IOUT = 800mA 10
20 IOUT = 800mA
125°C COUT = 10µF COUT = 10µF
0 0 0
1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 100 1000 10000 100000 1000000 1E+07
VIN (V) VIN (V) FREQUENCY (Hz)
3026 G07 3026 G08 3026 G09

Shutdown Threshold Output Current Limit BST to OUT Headroom Voltage

1200 5.0 2.22
VOUT = 0V
TA = 25°C 2.20
4.5
RISE 2.18
RISE 4.0
VSHDN THRESHOLD (mV)

FALL 2.16
900 FALL
VBST – VOUT (V)

RISE 3.5 2.14

IOUT (A)

FALL 2.12
3.0
2.10
2.5
600 CURRENT LIMIT 2.08
2.0
2.06
–40°C THERMAL LIMIT
25°C 1.5 2.04
125°C
300 1.0 2.02
1 2 3 4 5 6 1.0 1.5 2.0 2.5 3.0 3.5 –50 –25 0 25 50 75 100 125
VIN (V) VIN (V) TEMPERATURE (°C)
3026 G10 3026 G11 3026 G12

3026fd


LTC3026
Typical Performance Characteristics
Delay from Enable to PG with Delay from Enable to PG with
Boost Disabled Boost Enabled Output Load Transient Response
400 5.0 1.5A
VOUT = 0.8V
4.5 IOUT
ROUT = 8Ω 2mA
375 –40°C
4.0 25°C
3.5 85°C
350
OUT

DELAY (ms)
3.0
DELAY (µs)

AC 20mV/DIV
325 2.5
2.0
300 1.5
VOUT = 0.8V
ROUT = 8Ω
1.0
275 –40°C
25°C 0.5
85°C
250 0
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.0 1.5 2.0 2.5 3.0 3.5 50µs/DIV 3026 G15

VOUT = 1.5V
VIN (V) VIN (V) COUT = 10µF
3026 G13 3026 G14
VIN = 1.7V
VBST = 5V

BST Ripple and Feedthrough

IN Supply Transient Response BST/OUT Start-Up to OUT
HI
SHDN
2V LO
VIN
1.5V 5V VBST
AC 20mV/DIV
BST

1V

1.5V
VOUT VOUT
AC AC 5mV/DIV
10mV/DIV OUT

0V
10µs/DIV
3026 G16 200µs/DIV 3026 G17
20µs/DIV
3026 G18

VOUT = 1.2V TA = 25°C VOUT = 1.2V

IOUT = 800mA ROUT = 1Ω VIN = 1.5V
COUT = 10µF VIN = 1.7V IOUT = 1A
VBST = 5V COUT = 10µF
TA = 25°C LSW = 10µH
TA = 25°C

3026fd


 LTC3026
pin functions
IN (Pins 1, 2): Input Supply Voltage. Output load current pin (with boost enabled) until PG signals that regulation
is supplied directly from IN. The IN pin should be locally has been achieved. When providing an external BST volt-
bypassed to ground if the LTC3026 is more than a few inches age (i.e. boost converter disabled) a 1µF low ESR ceramic
away from another source of bulk capacitance. In general, capacitor can be used.
the output impedance of a battery rises with frequency, so SHDN (Pin 6): Shutdown Input Pin, Active Low. This pin
it is usually advisable to include an input bypass capacitor is used to put the LTC3026 into shutdown. The SHDN pin
when supplying IN from a battery. A capacitor in the range current is typically less than 10nA. The SHDN pin cannot
of 0.1µF to 4.7µF is usually sufficient. be left floating and must be tied to a valid logic level (such
GND (Pin 3, Exposed Pad Pin 11): Ground and Heat Sink. as IN) if not used.
Connect the exposed pad to the PCB ground plane or large PG (Pin 7): Power Good Pin. When PG is high impedance
pad for optimum thermal performance. OUT is in regulation, and low impedance when OUT is in
SW (Pin 4): Boost Switching Pin. This is the boost converter shutdown or out of regulation.
switching pin. A 4.7µH to 40µH inductor able to handle a ADJ (Pin 8): Output Adjust Pin. This is the input to the error
peak current of 150mA is connected from this pin to VIN. amplifier. It has a typical bias current of 0.1nA flowing into
The boost converter can be disabled by floating this pin or the pin. The ADJ pin reference voltage is 0.4V referenced
shorting this pin to GND. This allows the use of an external to ground. The output voltage range is 0.4V to 2.6V and is
boosted supply from a second LTC3026 or other source. typically set by connecting ADJ to a resistor divider from
See Operating with Boost Converter Disabled section for OUT to GND. See Figure 2.
more information.
OUT (Pins 9, 10): Regulated Output Voltage. The OUT pins
BST (Pin 5): Boost Output Voltage Pin. With boost con- supply power to the load. A minimum output capacitance
verter enabled bypass the BST pin with a ≥4.7µF low ESR of 5µF is required to ensure stability. Larger output capaci-
ceramic capacitor to GND (CBST). BST does not load VIN tors may be required for applications with large transient
when in shutdown, but is diode connected to IN through loads to limit peak voltage transients. See the Applica-
the external inductor, thus, will not go to ground with VIN tions Information section for more information on output
present. Users should not present any loads to the BST capacitance.

3026fd


LTC3026
Block Diagram

BOOST
CONVERTER
SW 4 5 BST

–
SHDN 6 SWITCHING
LOGIC EN
+

IN
SHDN
0.4V + 1,2
REFERENCE

UVLO –
OUT
VOFF
9,10
PG 7 – – + –

+
0.372V +
8 ADJ
OVERSHOOT DETECT
GND
3,11
3026 BD

3026fd


 LTC3026
Operation
The LTC3026 is a VLDO (very low dropout) linear regulator Operating with Boost Converter Disabled
which operates from input voltages as low as 1.14V. The The LTC3026 has an option to disable the internal boost
LDO uses an internal NMOS transistor as the pass device converter. With the boost converter disabled, the LTC3026
in a source-follower configuration. The BST pin provides becomes a bootstrapped device and the BST pin must be
the higher supply necessary for the LDO circuitry while the driven by an external 5V supply, or driven by the BST pin
output current comes directly from the IN input for high of a second LTC3026 with the boost converter enabled. The
efficiency regulation. The BST pin can either be supplied recommended method for disabling the boost converter
off-chip by an external 5V source or it can be generated is to simply float the SW pin. With the SW pin floating no
through the internal boost converter of the LTC3026. energy can be transferred to BST which effectively disables
the boost converter.
Boost Converter Operation
A second method for disabling the boost converter is to
For applications where an external 5V supply is not avail-
short SW to GND. Shorting SW to GND to disable the
able, the LTC3026 contains an internal boost converter to
boost converter should only be used in cases where IN
produce the necessary 5V supply for the LDO. The boost
is in its specified operating range when the LTC3026 is
converter utilizes Burst Mode® operation to achieve high
enabled. Enabling the part before VIN is in its operating
efficiency for the relatively low current levels needed for
range can cause current to be pulled off BST with the SW
the LDO circuitry. The boost converter requires only a
pin grounded. This can cause current limited supplies to
small chip inductor between the IN and SW pins and a
hang under the right conditions. Connecting SHDN to IN
small 4.7µF capacitor at BST.
will enable the part before IN is in its specified operating
The operation of the boost converter is described as fol- range. With SHDN connected to IN the SW pin should be
lows. During the first half of the switching cycle, an internal floated to disable the boost converter. Either method of
NMOS switch between SW and GND turns on, ramping disabling the boost converter may be used if the signal
the inductor current. A peak comparator senses when the driving the SHDN pin is high only when IN is in its specified
inductor current reaches 100mA, at which point the NMOS operating range. Connecting SHDN to the power good pin
is turned off and an internal PMOS between SW and BST of the supply driving IN is one method that allows both
turns on, transferring the inductor current to the BST pin. disable methods to be used.
The PMOS switch continues to deliver power to BST until
A single LTC3026 boost converter can be used to drive
the inductor current approaches zero, at which point the
multiple bootstrapped LTC3026s with the internal boost
PMOS turns off and the NMOS turns back on, repeating
converters disabled. Thus a single inductor can be used
the switching cycle.
to power two (or possibly more) functioning LTC3026s.
A burst comparator with hysteresis monitors the voltage on In cases where all LTC3026s have the same input supply
the BST pin. When BST is above the upper threshold of the (IN) the internal boost converters of the bootstrapped
comparator, no switching occurs. When BST falls below the LTC3026s can be disabled by shorting SW to GND or float-
comparator’s lower threshold, switching commences and ing the SW pin. If the LTC3026s are not all connected to
the BST pin gets charged. The upper and lower thresholds the same input supply then the internal boost converters
of the burst comparator are set to maintain a 5V supply at of the bootstrapped LTC3026s are disabled by floating
BST with approximately 40mV to 50mV of ripple. the SW pin.
Care must be taken not to short the BST pin to GND, since If there is ever a doubt about which method to use re-
the body diode of the internal PMOS transistor connects member that it is always safe to float the SW pin to dis-
the BST and SW pins. Shorting BST to GND with an induc- able the boost converter. There is no noticeable difference
tor connected between IN and SW can ramp the inductor in performance of the part regardless of which disable
current to destructive levels, potentially destroying the method is used.
inductor and/or the part.
3026fd


LTC3026
operation
LDO Operation the LDO reference voltage from 0V to 0.4V over a period
of approximately 200µs, see Figure 2.
An undervoltage lockout comparator (UVLO) senses the
BST pin voltage to ensure that the bias supply for the LDO HI
is greater than 4.2V before enabling the LDO. If BST is SHDN
LO
below 4.2V, the UVLO shuts down the LDO, and OUT is
1.5V
pulled to GND through the external divider.
The LDO provides a high accuracy output capable of OUT

supplying 1.5A of output current with a typical dropout

voltage of only 100mV. A single ceramic capacitor as 0V

small as 10µF is all that is required for output bypassing.

1.5V
A low reference voltage allows the LTC3026 output to be PG
programmed to much lower voltages than available in 0V
TA = 25°C
common LDOs (range of 0.4V to 2.6V). 100µs/DIV 3026 F02

ROUT = 1Ω
VIN = 1.7V
The devices also include current limit and thermal over- VB = 5V

load protection, and will survive an output short-circuit Figure 2. Soft-Start with Boost Disable
indefinitely. The fast transient response of the follower
output stage overcomes the traditional trade-off between
dropout voltage, quiescent current and load transient Adjustable Output Voltage
response inherent in most LDO regulator architectures, The output voltage is set by the ratio of two external resis-
see Figure 1. tors as shown in Figure 3. The device servos the output
to maintain the ADJ pin voltage at 0.4V (referenced to
1.5A ground). Thus, the current in R1 is equal to 0.4V/R1. For
IOUT
0mA good transient response, stability and accuracy the current
in R1 should be at least 80µA, thus, the value of R1 should
be no greater than 5k. The current in R2 is the current in
OUT
AC 20mV/DIV R1 plus the ADJ pin bias current. Since the ADJ pin bias
current is typically <10nA it can be ignored in the output
voltage calculation. The output voltage can be calculated
using the formula in Figure 3. Note that in shutdown the
output is turned off and the divider current will be zero
once COUT is discharged.
3026 F01
VOUT = 1.5V 100µs/DIV
COUT = 10µF
VIN = 1.7V
VB = 5V ¥ R2 ´
VOUT VOUT  0.4V ¦ 1
§ R1 µ¶
LTC3026 R2
Figure 1. Output Load Step Response
ADJ COUT
R1
The LTC3026 also includes a soft-start feature to prevent GND

excessive current flow at VIN during start-up. When the 3026 F03

LDO is enabled, the soft-start circuitry gradually increases

Figure 3. Programming the LTC3026

3026fd

10
 LTC3026
Operation
The LTC3026 operates at a relatively high gain of The LTC3026 is a micropower device and output transient
270µV/A referred to the ADJ input. Thus, a load current response will be a function of output capacitance. Larger
change of 1mA to 1.5A produces a 400µV drop at the ADJ values of output capacitance decrease the peak deviations
input. To calculate the change in the output, simply mul- and provide improved transient response for larger load
tiply by the gain of the feedback network (i.e. 1 + R2/R1). current changes. Note that bypass capacitors used to
For example, to program the output for 1.2V choose decouple individual components powered by the LTC3026
R2/R1 = 2. In this example an output current change of will increase the effective output capacitor value. High
1mA to 1.5A produces –400µV • (1 + 2) = 1.2mV drop at ESR tantalum and electrolytic capacitors may be used,
the output. but a low ESR ceramic capacitor must be in parallel at the
output. There is no minimum ESR or maximum capacitor
Power Good Operation size requirements.
The LTC3026 includes an open-drain power good (PG) Extra consideration must be given to the use of ceramic
output pin with hysteresis. If the chip is in shutdown or capacitors. Ceramic capacitors are manufactured with a
under UVLO conditions (VBST < 4.25V), PG is low im- variety of dielectrics, each with different behavior across
pedance to ground. PG becomes high impedance when temperature and applied voltage. The most common di-
VOUT rises to 93% of its regulation voltage. PG stays high electrics used are Z5U, Y5V, X5R and X7R. The Z5U and
impedance until VOUT falls back down to 91% of its regula- Y5V dielectrics are good for providing high capacitances
tion value. A pull-up resistor can be inserted between PG in a small package, but exhibit strong voltage and tem-
and a positive logic supply (such as IN, OUT, BST, etc.) perature coefficients as shown in Figures 4 and 5. When
to signal a valid power good condition. VIN should be the used with a 2V regulator, a 10µF Y5V capacitor can exhibit
minimum operating voltage (1.14V) or greater for PG to an effective value as low as 1µF to 2µF over the operating
function correctly. temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
Output Capacitance and Transient Response as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
The LTC3026 is designed to be stable with a wide range
is available in higher values.
of ceramic output capacitors. The ESR of the output
capacitor affects stability, most notably with small ca- A minimum capacitance of 5µF must be maintained at all
pacitors. An output capacitor of 10µF or greater with an times on the LTC3026 LDO output.
ESR of 0.05Ω or less is recommended to ensure stability.

20 20
BOTH CAPACITORS ARE 10µF,
6.3V, 0805 CASE SIZE X5R
0 0
X5R
CHANGE IN VALUE (%)

CHANGE IN VALUE (%)

–20 –20
Y5V
–40 –40

–60 –60
Y5V
–80 –80
BOTH CAPACITORS ARE 10µF,
6.3V, 0805 CASE SIZE
–100 –100
0 1 2 3 4 5 6 –50 –25 0 25 50 75
DC BIAS VOLTAGE (V) 3026 F04 TEMPERATURE (°C) 3026 F05

Figure 4. Ceramic Capacitor DC Bias Characteristics Figure 5. Ceramic Capacitor Temperature Characteristics
3026fd

11
LTC3026
operation
Boost Converter Component Selection For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
A 10µH chip inductor with a peak saturation current (ISAT)
and its copper traces. Copper board stiffeners and plated
of at least 150mA is recommended for use with the internal
through holes can also be used to spread the heat gener-
boost converter. The inductor value can range between
ated by power devices.
4.7µH to 40µH, but values less than 10µH result in higher
switching frequency, increased switching losses, and lower A junction-to-ambient thermal coefficient of 40°C/W is
max output current available at the BST pin. See Table 1 achieved by connecting the exposed pad of the MSOP
for a list of component suppliers. or DFN package directly to a ground plane of about
2500mm2.
Table 1. Inductor Vendor Information
SUPPLIER PART NUMBER WEBSITE Calculating Junction Temperature
Coilcraft 0603PS-103KB [Link]
Example: Given an output voltage of 1.2V, an input voltage
Murata LQH2MCN100K02 [Link]
of 1.8V ±4%, an output current range of 0mA to 1A and
Taiyo Yuden LB2016T100M [Link]
a maximum ambient temperature of 50°C, what will the
TDK NLC252018T-100K [Link]
maximum junction temperature be?
It is also recommended that the BST pin be bypassed to The power dissipated by the device will be approximately:
ground with a 4.7µF or greater ceramic capacitor. Larger
values of capacitance will not reduce the size of the BST IOUT(MAX)(VIN(MAX) – VOUT)
ripple much, but will decrease the ripple frequency propor- where:
tionally. The BST pin should maintain 1µF of capacitance
at all times to ensure correct operation (See the “Output IOUT(MAX) = 1A
Capacitance and Transient Response” section about VIN(MAX) = 1.87V
capacitor selection). High ESR tantalum and electrolytic so:
capacitors may be used, but a low ESR ceramic must be
P = 1A(1.87V – 1.2V) = 0.67W
used in parallel for correct operation.
Even under worst-case conditions LTC3026’s BST pin
Thermal Considerations power dissipation is only about 1mW, thus can be ignored.
The power handling capability of the device will be limited The junction to ambient thermal resistance will be on the
by the maximum rated junction temperature (125°C). order of 40°C/W. The junction temperature rise above
The majority of the power dissipated in the device will be ambient will be approximately equal to:
the output current multiplied by the input/output voltage 0.67W(40°C/W) = 26.8°C
differential: (IOUT)(VIN – VOUT). Note that the BST current
The maximum junction temperature will then be equal to
is less than 200µA even under heavy loads, so its power
the maximum junction temperature rise above ambient
consumption can be ignored for thermal calculations.
plus the maximum ambient temperature or:
The LTC3026 has internal thermal limiting designed to
TA = 26.8°C + 50°C = 76.8°C
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction Short-Circuit/Thermal Protection
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of The LTC3026 has built-in output short-circuit current
thermal resistance from junction to ambient. Additional limiting as well as overtemperature protection. During
heat sources mounted nearby must also be considered. short-circuit conditions, internal circuitry automatically

3026fd

12
 LTC3026
Operation
limits the output current to approximately 3A. At higher Layout Considerations
temperatures, or in cases where internal power dissipa- Connection from BST and OUT pins to their respec-
tion cause excessive self heating on-chip, the thermal tive ceramic bypass capacitor should be kept as short
shutdown circuitry will shut down the boost converter and as possible. The ground side of the bypass capacitors
LDO when the junction temperature exceeds approximately should be connected directly to the ground plane for best
150°C. It will reenable the converter and LDO once the results or through short traces back to the GND pin of the
junction temperature drops back to approximately 140°C. part. Long traces will increase the effective series ESR
The LTC3026 will cycle in and out of thermal shutdown and inductance of the capacitor which can degrade
without latchup or damage until the overstress condition performance.
is removed. Long term overstress (TJ > 125°C) should
be avoided as it can degrade the performance or shorten With the boost converter enabled, the SW pin will be
the life of the part. switching between ground and 5V whenever the BST pin
needs to be recharged. The transition edge rates of the SW
Reverse Input Current Protection pin can be quite fast (~10ns). Thus care must be taken to
make sure the SW node does not couple capacitively to
The LTC3026 features reverse input current protection to
other nodes (especially the ADJ pin). Additionally, stray
limit current draw from any supplementary power source
capacitance to this node reduces the efficiency and amount
at the output. Figure 6 shows the reverse output current
of current available from the boost converter. For these
limit for constant input and output voltages cases. Note:
reasons it is recommended that the SW pin be connected
Positive input current represents current flowing into the to the switching inductor with as short a trace as possible.
VIN pin of LTC3026. If the user has any sensitive nodes near the SW node, a
With VOUT held at or below the output regulation voltage ground shield may be placed between the two nodes to
and VIN varied, IN current flow will follow Figure 6’s curves. reduce coupling.
IIN reverse current ramps up to about 16µA as the VIN Because the ADJ pin is relatively high impedance (depend-
approaches VOUT. Reverse input current will spike up as ing on the resistor divider used), stray capacitance at this
VIN approaches within about 30mV of VOUT as the reverse pin should be minimized (<10pF) to prevent phase shift
current protection circuitry is disabled and normal opera- in the error amplifier loop. Additionally special attention
tion resumes. As VIN transitions above VOUT the reverse should be given to any stray capacitances that can couple
current transitions into short-circuit current as long as external signals onto the ADJ pin producing undesirable
VOUT is held below the regulation voltage. output ripple. For optimum performance connect the ADJ
pin to R1 and R2 with a short PCB trace and minimize all
30 other stray capacitance to the ADJ pin.
IN CURRENT
20 LIMIT ABOVE 1.45V

CIN COUT
IIN CURRENT (µA)

10

1 IN OUT 10
0
2 IN OUT 9 R2
LSW

–10 3 GND ADJ 8

4 SW PG 7 R1
–20 5 BST SHDN 6

–30 CBST
0 0.3 0.6 0.9 1.2 1.5 1.8 3026 F07

INPUT VOLTAGE (V) VIA CONNECTION TO GND PLANE

3026 F06

Figure 6. Input Current vs Input Voltage Figure 7. Suggested Layout

3026fd

13
LTC3026
typical applications
Using 1 Boost with Multiple Regulators

VIN = 2.5V

TO ADDITIONAL
REGULATORS
10µH
SW BST SW* BST
LTC3026 4.7µF LTC3026 1µF
VOUT1 VOUT2
IN OUT 1.8V, 1.5A IN OUT
1.5V, 1.5A
14k 11k
COUT1 COUT2
SHDN ADJ 10µF SHDN ADJ 10µF
100k 4.02k 100k 4.02k
4.7µF 1µF
GND PG PG1 GND PG PG2

LTC3026 WITH BOOST ENABLED FANOUT: BOOT STRAPPED LTC3026

3-LTC3026 FOR VIN <1.4V (BOOST DISABLED)
5-LTC3026 FOR VIN >1.4V 3026 TA02

* THE SW PIN OF BOOTSTRAPPED LTC3026 SHOULD BE FLOATED (DISCONNECTED FROM GND) IN CASES WHERE THE BOOTSTRAPPED
LTC3026 DOES NOT SHARE THE SAME INPUT SUPPLY (IN) AS THE BOOSTING LTC3026.

2.5V Output from 3.3V Supply with External 5V Bias

VBIAS = 5V

N/C SW* BST

LTC3026 1µF

VIN = 3.3V VOUT

IN OUT
2.5V, 1.5A
21k
COUT
SHDN ADJ 10µF
100k 4.02k
1µF
GND PG PG

3026 TA03

* SEE OPERATING WITH BOOST CONVERTER

DISABLED SECTION FOR INFORMATION ON
DISABLING BOOST CONVERTER.

3026fd

14
 LTC3026
Package Description
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)

BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
2.794 p 0.102 0.889 p 0.127
(.110 p .004) 1 (.081 p .004) 0.29
(.035 p .005)
1.83 p 0.102 REF
(.072 p .004)

5.23 0.05 REF

2.083 p 0.102 3.20 – 3.45
(.206) DETAIL “B”
(.082 p .004) (.126 – .136)
MIN CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
10
NO MEASUREMENT PURPOSE
0.305 p 0.038 0.50 3.00 p 0.102
(.0120 p .0015) (.0197) (.118 p .004) 0.497 p 0.076
TYP BSC (NOTE 3) (.0196 p .003)
RECOMMENDED SOLDER PAD LAYOUT 10 9 8 7 6
REF

4.90 p 0.152 3.00 p 0.102

(.193 p .006) (.118 p .004)
(NOTE 4)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
GAUGE PLANE 1 2 3 4 5

0.53 p 0.152 1.10 0.86

(.021 p .006) (.043) (.034)
MAX REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE 0.17 – 0.27 0.1016 p 0.0508
(.007 – .011) (.004 p .002)
0.50
TYP MSOP (MSE) 0908 REV C
NOTE: (.0197)
1. DIMENSIONS IN MILLIMETER/(INCH) BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3026fd

15
LTC3026
Package Description
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1669 Rev B)

0.70 p0.05

3.55 p0.05 1.65 p0.05

2.15 p0.05 (2 SIDES)

PACKAGE
OUTLINE

0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

R = 0.125 0.40 p 0.10
TYP
6 10

3.00 p0.10 1.65 p 0.10

(4 SIDES) (2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN REV B 0309

5 1
0.200 REF 0.75 p0.05 0.25 p 0.05
0.50 BSC
2.38 p0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

3026fd

16
 LTC3026
Revision History (Revision history begins at Rev D)

REV DATE DESCRIPTION PAGE NUMBER

D 3/10 Addition to Absolute Maximum Ratings 1
Changes to Electrical Characteristics 3, 4
Changes to Pin Functions 7,
Changes to Operation Section 9
Changes to Typical Applications 14, 18
Additions to Related Parts 18

3026fd

17
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3026
Typical Application
Efficient, Low Noise 1.5V Output from 1.8V DC/DC Buck Converter
(LTC3026 Boost Converter Disabled)
4.5V ≤ VIN ≤ 5.5V

33pF

200pF
30k 1 10
ITH SW RSENSE
0.1µF LTC1773 0.04Ω
2 9
RUN/SS SENSE–

3 8 1µF
SYNC/FCB VIN VBUCK
1.8V N/C SW BST
L1 2A
4 7 LTC3026
VFB TG 2.5µH VOUT
IN OUT 1.5V
CIN 1.5A
5 6 11k
47µF GND BG COUT
10V SHDN ADJ
10µF
Si9942DY 1µF 100k 4.02k
CBUCK PG
100k GND PG
80.6k 47µF
1% 1% 10V
3026 TA04

CIN, CBUCK: TAIYO YUDEN LMK550BJ476MM

L1: CDRH5D28
RSENSE: IRC LR1206-01-R040-F

Related Parts
PART NUMBER DESCRIPTION COMMENTS
LT1761 100mA, Low Noise LDO in ThinSOT™ 300mV Dropout Voltage, Low Noise: 20µVRMS, VIN = 1.8V to 20V, ThinSOT Package
LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µVRMS, VIN = 1.8V to 20V, MS8 Package
LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µVRMS, VIN = 1.8V to 20V, SO-8 Package
LT1764A 3A, Fast Transient Response, Low Noise LDO 340mV Dropout Voltage, Low Noise: 40µVRMS, VIN = 2.7V to 20V,
TO-220 and DD Packages
LT1844 150mA, Very Low Dropout LDO 80mV Dropout Voltage, Low Noise <30µVRMS, VIN = 1.6V to 6.5V,
Stable with 1µF Output Capacitors, ThinSOT Package
LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise 20µVRMS, VIN = 1.8V to 20V, MS8 Package
LT1963A 1.5A Low Noise, Fast Transient Response LDO 340mV Dropout Voltage, Low Noise: 40µVRMS, VIN = 2.5V to 20V,
TO-220, DD, SOT-223 and SO-8 Packages
LT1964 200mA, Low Noise, Negative LDO 340mV Dropout Voltage, Low Noise 30µVRMS, VIN = –1.8V to –20V,
ThinSOT Package
LT1965 1.1A, Low Noise, Low Dropout Linear 290mV Dropout Voltage, Low Noise 40µVRMS, VIN = 1.8V to 20V, TO-220, DDPak,
Regulator MSOP and 3mm × 3mm DFN Packages
LTC3025 300mA Micropower VLDO Linear Regulator 45mV Dropout Voltage, Low Noise 80µVRMS, VIN = 0.9V to 5.5V,
Low IQ: 54µA, 2mm × 2mm 6-Lead DFN Package
LT3080/LT3080-1 1.1A, Parallelable, Low Noise, Low Dropout 300mV Dropout Voltage (2 Supply), Low Noise 40µVRMS, VIN = 1.2V to 36V,
Linear Regulator VOUT = 0V to 35.7V, Directly Parallelable, TO-220, SOT-223, MSOP-8 and
3mm × 3mm DFN Packages
LT3150 Fast Transient Response, VLDO Regulator 0.035mV Dropout Voltage via External FET, VIN = 1.3V to 10V
Controller

3026fd

18 Linear Technology Corporation

LT 0310 REV D • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● [Link]  LINEAR TECHNOLOGY CORPORATION 2005