System Resources

• System resources are the communications

channels, addresses, and other signals
hardware devices use to communicate on the
bus.
• Various system resources are:
1. IRQ (interrupt request) channels
2. DMA (direct memory access) channels
3. I/O port addresses
4. Memory addresses
• IRQs cause more problems than DMAs because they are in
much higher demand; because almost all cards use IRQ
channels.
• I/O ports are used by all hardware devices on the bus, but
there are technically 64KB of them, which means there are
plenty to go around.
• These resources are required and used by many components
of your system, but it is not necessary that all cards use same
resources.
Eg. Sound Card Requires: IRQ Channel, DMA Channel, I/O ports.
Serial Port Requires: IRQ Channel, I/O ports.
• As your system increases in complexity, the chance for
resource conflicts increases.
 Interrupt
• Interrupts are used by various hardware devices
to signal the motherboard that a request must
be fulfilled.
• Basically it is a an exceptional event which
causes the CPU to temporarily suspend its
current execution
Interrupt processing may be done in two ways:
1. Polling
2. Interrupt.
 [Link]
• Polling is like voting on the polling booth i.e. all
processes are in queue and waiting for CPU.
• Each device has a status bit.
• If the bit is set, it means that the device is
requesting service.
• Interrupting device that comes first in polling
order gets serviced first.
• Disadvantage: A high priority process may have
to wait for a long time.
 2. Interrupt
• Interrupt channels are represented by wires on mother board.
• Each device has its own interrupt channel.
• When a device requires service, it sends signal to CPU via
these IRQs.
• Before servicing the interrupt, CPU saves contents of all
registers in stack.
• It transfer control to interrupt vector table, which contains
memory address of Interrupt Service Routine for
corresponding interrupt.
• After servicing the interrupt , control returns to suspended
program for execution.
Flowchart of basic interrupt mechanism
Fetch
Instruction

Decode and Increment PC

Execute instr.

Int request line

active No Restore PC

Interrupt
Yes
Store PC service
Routine
 Steps in handling interrupts
• Disable further interrupts.
• Store current state of program.
• Execute appropriate interrupt handling
routine.
• Restore state of program.
• Enable interrupts.
• Resume program execution.
 Masking interrupts
• It is sometimes advantageous to disable
interrupts while the processor is performing
some critical operation (like handling another
interrupt).
• On some systems there may be one or more
high priority interrupts that cannot be
masked.
Primary Sources of H/W Interrupts
• Disk Drives.
• Keyboard.
• Mouse.
• Sound Cards.
• Serial Ports.
• Parallel Ports.
• PC Timer Chips etc.
 DMA
• Direct Memory Access (DMA) channels are
used by communications devices that must
send and receive information at high speeds.
• A DMA controller implements direct memory
access in a computer system.
• It connects directly to the I/O device at one
end and to the system buses at the other end.
It also interacts with the CPU, both via the
system buses and two new direct connections.
Computer System with DMA
 INPUTs to DMA Controller
• Initial memory address.
• Number of bytes to be input.
• Address of the Source.
Data Transfer using DMA Controller
• Bus Request to CPU.
• Bus Grant from CPU.
• Bus grant acknowledge to CPU.
• DMA controller reads device.
• DMA controller writes to memory.
• DMA controller increments counter.
• DMA controller checks end of count.
• After transfer, sends interrupt to CPU.
 I/O Ports
• I/O devices cannot be directly interfaced to
CPU Buses.
• They are connected to CPU buses using I/O
Ports.
• I/O ports enable communications between
devices and software in your system.
• I/O ports contains bus drivers, data buffers,
status registers, control lines etc.
Examples of I/O Ports
 Interfacing of I/O Devices

Address
I/P Device
Bus

Micro Data I/O

Processor
bus
Ports
Control O/P Device
Bus
 Types of I/O Ports
• Programmable I/O Ports
• Non Programmable I/O Ports.
 Programmable I/O Ports
• Is permanently connected to computer.
• Can be made to act as either I/P port or O/P
port by software techniques.
i.e. same port can be programmed as I/P port
for one problem and for other problem it can
be used as O/P port.
 Non-Programmable I/O Ports
• permanently connected to processor.
• If a port is connected as I/P port, it will always
act as an I/P port.
• If a port is connected as O/P port, it will
always act as O/P port.
• Operating mode to act as I/P or O/P port can
not be altered by user.
Programmable peripheral Interface
• It is a multiport device.
• Its ports can be programmed to act as either
I/P port or O/P port.
• It is also called Peripheral Interface Adapter or
Versatile Interface Adapter.
Intel 8255A, Intel 82c55A
 Intel 8255
• The 8255 has 24 input/output pins in all.
• These are divided into three 8-bit ports.
• Port A and port B can be used as 8-bit
input/output ports.
• Port C can be used as an 8-bit input/output
port or as two 4-bit input/output ports or to
produce handshake signals for ports A and B.
 Cont……
• This is the pin diagram of Intel 8255A
(Programmable Peripheral Interface - PPI).
It is used in microprocessor systems to
interface input/output devices.
 Cont…..
• Left Side (Control & Data pins)
• D0 – D7 (8 pins): These are data bus lines.
Used to transfer data between microprocessor
and 8255.
• RD̅ (Read): When this signal is active (low), data
from 8255 is sent to the microprocessor.
• WR̅ (Write): When active (low), data/command
is written from microprocessor to 8255.
 Cont…..
• A1, A0 (Address lines): Select which port or control
register to access.
– A1 A0 = 00 → Port A
– A1 A0 = 01 → Port B
– A1 A0 = 10 → Port C
– A1 A0 = 11 → Control register
• RESET: Clears all ports and sets them to input mode.
• CS̅ (Chip Select): Activates the chip when low; if high, 8255
is not active.
• Vcc (+5V): Power supply.
• Vss (0V): Ground connection.
 Cont…….
• Right Side (Ports for I/O devices)
• Port A (PA0 – PA7): 8-bit port for input/output.
• Port B (PB0 – PB7): Another 8-bit port for
input/output.
• Port C (PC0 – PC7): 8-bit port but divided into
two parts:
– PC0–PC3 (lower 4 bits)
– PC4–PC7 (upper 4 bits)
Each can be used separately for control or data.
 Cont…..

•Left side pins = control, data, and power connections with microprocessor.
•Right side pins = input/output ports to connect devices like LEDs,
switches, displays, etc.
Address Lines
A1 A0 Function
0 0 port A
0 1 port B
1 0 port C
1 1 control register
 I/O MODES
• MODE 0: the ports can be used for
simple input/output operations without
handshaking.
• MODE 1 : to use port A or port B for
handshake (strobed) input or output
operation
• MODE 2: Port A can be used for
bidirectional handshake data transfer.
 Universal Serial Bus
• A high speed serial bus.
• It consist of 4 wires.
• It provide power lines along with data lines i.e.
2 wires are for power supply.
• Other two wires are used to send and receive
data.
• Low power devices like keyboard, mouse can
be connected to USB.
 Modes of operation
1. Low speed mode: data transfer rate is
1.5Mbps.
2. High speed mode: data transfer rate is 12
Mbps.
a. Real time transfer
b. Interrupt driven
c. Bulk data transfer
 I/o Port Addresses
• I/o ports enable comm. between devices and
S/Ws in system.
• Whenever we need to communicate to a
port/device, we must know the address of
port.
• There are 65535 ports addressed from 0000H-
FFFFh.
• Addresses are similar to memory addresses.
• Motherboard and chipset devices usually are set to
use I/O port addresses 0h–FFh, and all other devices
use 100h–FFFFh.
• Example:

• Address (hex) Size Description

• 0000–000F 16 bytes Chipset - 8237 DMA 1
• 0020–0021 2 bytes Chipset - 8259 interrupt controller
1
• 0040–0043 4 bytes Chipset - Counter/Timer 1
• 0048–004B 4 bytes Chipset - Counter/Timer 2
• 0060 1 byte Keyboard/Mouse controller
• 0061 1 byte Chipset - NMI, speaker control
• 0078 1 byte Reserved - Board configuration
 Conflicts of Resources
• The resources in a system are limited. But the
demands on those resources seem to be
unlimited.
So the resource conflict occurs in system.
 Symptoms of Resource Conflict
• A device transfers data inaccurately.
• Your system frequently locks up.
• Your sound card doesn’t sound quite right.
• Your mouse doesn’t work.
• Garbage appears on your video screen for no
apparent reason.
• You can’t format a floppy disk.
 Resolving Conflicts
1. By avoiding the use of older ISA devices.
2. Install cards in a sequence.
3. PnP setting in the BIOS should be enabled.
4. Complete the installation of all built in
devices before external devices.
5. Restart the system after fully completing the
installation.
 Resolving Conflicts Manually
• Note down the current system setting.
• Use the manuals to configure the adapter
boards.
• Try resource setting :
– When did a conflict occurs??
– Are there two similar devices that do not work ?
– Take help of other people etc.
Restart system after making changes.
 Introduction to I/O Buses
• I/O buses connect CPU, memory, and
peripherals.
• Provide a pathway for data transfer between
computer and devices.
• Common buses: ISA, EISA, and Local Bus.
 ISA (Industry Standard Architecture)

• Introduced in IBM PCs (1981).

• Initially 8-bit, later 16-bit bus width.
• Clock speed: 8 MHz.
• Connected peripherals like sound cards,
network cards, modems.
• Limitation: Slow for advanced devices.
 EISA (Extended Industry Standard
Architecture)
• Introduced in 1988 as an enhancement of ISA.
• 32-bit bus width with 8.33 MHz speed.
• Backward compatible with ISA cards.
• Used in servers and workstations for faster
disk and network interfaces.
• Allowed better multitasking with peripherals.
 Local Bus (VESA Local Bus, PCI)
• Direct connection to CPU local bus for high-
speed transfer.
• Wider data paths: 32-bit or more.
• Common in video cards and high-speed
peripherals.
• Example: VESA Local Bus, later replaced by PCI
and PCI Express.
• Greatly improved graphics and storage device
performance.
 Comparison of Buses
• ISA: 8/16-bit, slower, early peripheral support.
• EISA: 32-bit, backward compatible, better for
servers.
• Local Bus: Direct CPU connection, faster, used
for graphics and storage devices.
 Conclusion
• Buses are vital for connecting peripherals with
the CPU.
• ISA supported early expansion devices.
• EISA improved speed and compatibility for
servers.
• Local Bus boosted performance of graphics
and high-speed devices.
• Evolution continued with PCI and PCI Express.
 General I/O Bus Architecture
Peripheral Devices
CPU I/O Bus (Keyboard, Printer,
Display)
Evolution of Buses (ISA → EISA → Local Bus)
Local Bus
ISA EISA
32-bit+
8/16-bit 32-bit
Fast,
Slow Better for Servers
Graphics/Storage
 EISA
• Extended ISA Bus.
• 32 bit bus .
• Compatible with ISA.
• Automatic Configuration via software.
• Clock Speed= 8.33 MHz.
• Data Transfer Rate= 33.32 MBPS.
• Interrupt Sharing
 VESA
• Video Electronics Standard Association.
• Developed in 1992.
• Also called VL-Bus or VLB.
• 32 bit bus.
• Clock Speed = 33 MHz.
• Use of VLB Video card greatly increases
performance of system.
 PCI (1 of 2)
• Peripheral Component Interconnect
– Also called “Local Bus”
• History
– Developed by Intel (1993)
– Very successful, widely used
– Much faster than ISA
– Gradually replacing ISA
• Configuration
– Parallel, multi-drop
 PCI (2 of 2)
• Used for…
– Just about any peripheral
– Can support multiple high-performance devices
– Graphics, full-motion video, SCSI, local area networks,
etc.
• Specifications
– 64-bit bus capability
– Usually implemented as a 32-bit bus
– Runs at 33 MHz or 66 MHz
– At 33 MHz and a 32-bit bus, data rate is 133 Mbytes/s
 Accelerated Graphics Port
• A 32 bit expansion slot designed for video cards.
• specifically designed for high-performance
graphics and video support.
• AGP is based on PCI but it is an enhancement of
PCI.
• AGP is more used for a point-to-point high-
performance connection.
• latest revision for the AGP specification for PCs is
AGP 8x, also called AGP 3.0.
Identifying ISA, PCI, & AGP slots
– Here’s an image to help in identifying slots

Back of AGP slot

computer
PCI slot

ISA slot
 Introduction to I/O Buses

• I/O buses provide communication pathways

between CPU, memory, and peripherals.
• Functions:
– Data transfer between system components
– Device compatibility
– Expansion slot standardization
• Examples: VESA, PCI, PCI Express, AGP
 VESA Local Bus (VLB) – Overview

• Introduced in early 1990s by VESA.

• Mainly used for video cards.
• Direct connection to CPU local bus.
• Operated at CPU clock speed (25–50 MHz).
• Diagram: Motherboard with VESA slots
highlighted.
VESA Local Bus – Advantages & Limitations

• Advantages:
– High-speed performance for graphics.
– Improved over ISA bus.
• Limitations:
– Limited expansion slots.
– Electrical stability issues at higher speeds.
– Quickly outdated.
 PCI (Peripheral Component Interconnect) – Overview

• Introduced in 1992 by Intel.

• Supports 32-bit & 64-bit data paths.
• Clock speed: 33 MHz → 66 MHz.
• Plug-and-play support.
• Diagram: Image of a PCI slot and card.
 PCI – Uses and Importance

• Widely adopted in 1990s–2000s.

• Used for:
– Sound cards
– Network cards
– Modems
– Low-end graphics
• Diagram: Block diagram showing CPU ↔ PCI
Bus ↔ Multiple Devices.
 PCI Express (PCIe) – Overview

• Introduced in 2004 as PCI/AGP successor.

• High-speed serial interface.
• Lane configurations: x1, x4, x8, x16.
• Full-duplex communication.
• Diagram: PCIe lanes structure (serial point-to-
point links).
 PCI Express – Advantages

• Scalability with multiple lanes.

• Much higher bandwidth than PCI & AGP.
• Supports modern GPUs, SSDs, network
adapters.
• Backward compatibility with PCI standards.
AGP (Accelerated Graphics Port) – Overview

• Introduced in 1997 by Intel.

• Designed exclusively for graphics cards.
• Direct CPU ↔ Memory ↔ GPU link.
• Higher bandwidth than PCI for rendering.
• Versions: AGP 1x, 2x, 4x, 8x.
• Diagram: Flow showing CPU ↔ AGP ↔ GPU.
 AGP – Role and Limitations

• Role: Improved graphics rendering in late

1990s/early 2000s.
• Limitations:
– Dedicated only to graphics.
– Replaced by PCI Express after 2005.
 Comparison of I/O Buses

Bus Type Year Usage Speed Strength Limitation

VLB 1992 Graphics 25–50 MHz High speed Instability

General Bandwidth
PCI 1992 33–66 MHz Versatility
devices limit

Single-
AGP 1997 Graphics 1x–8x GPU focus
purpose

Modern x1–x16
PCIe 2004 Scalability Complexity
devices lanes
 Evolution Timeline

• 1990: ISA → VLB

• 1992: PCI standard
• 1997: AGP introduced
• 2004: PCI Express becomes industry standard
• Diagram: Timeline with arrows showing
evolution.
 Conclusion
• VLB: Early attempt at high-speed graphics.
• PCI: Versatile, widely adopted.
• AGP: Graphics-focused but short-lived.
• PCIe: Current and future standard for high-
performance peripherals.