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The document is a resume detailing the educational qualifications, technical skills, projects, courses, positions of responsibility, achievements, and extracurricular activities of an individual pursuing a career in VLSI design. The candidate holds an M. Tech in VLSI from NIT Delhi and a B. Tech in ECE from JNTUH, with various projects including soft error detection circuits and IoT-based applications. The resume also highlights teaching assistant roles and participation in technical symposiums, along with a declaration of the information's accuracy.

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23 views2 pages

Format Resume

The document is a resume detailing the educational qualifications, technical skills, projects, courses, positions of responsibility, achievements, and extracurricular activities of an individual pursuing a career in VLSI design. The candidate holds an M. Tech in VLSI from NIT Delhi and a B. Tech in ECE from JNTUH, with various projects including soft error detection circuits and IoT-based applications. The resume also highlights teaching assistant roles and participation in technical symposiums, along with a declaration of the information's accuracy.

Uploaded by

klkswathi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Name :

Phone number : LinkedIn profile :

Objective

To secure a challenging position where I can effectively contribute my skills and


innovative ideas to gain knowledge in a work-oriented environment.
Educational Qualification

Degree/ CGPA/
Year Institution/Board
Examination Percentage
M. Tech (VLSI) National Institute of Technology
2022-2024 8.9
Delhi
B. Tech (ECE) JNTUH College of Engineering
2016-2020 85.1
Hyderabad
2014-2016 Class XII Trinity Junior College, Karimnagar 97.9
2013-2014 Class X S.V.V High School, Godavarikhani 9.7

Technical Skills

• Programming Languages :C
• Hardware Description Languages : Verilog HDL
• Engineering Software : Cadence Virtuoso, Xilinx Vivado, LT spice,
MATLAB, Multisim
• Other Software : Microsoft Word, PowerPoint
Projects

1. A Soft Error Detection and Recovery Flip-Flop for Aggressive Designs with
High-Performance
This is an IEEE transaction (published in June 2022). A radiation-hardened flop is proposed in this paper.
Soft Errors occur due to exposure of ICs to High-energy particles or solar radiation, a concern in many
applications, including aerospace and military systems.
To mitigate these Soft Errors, the proposed circuit detects and recovers the fault that occurred in the data
using four latches and an error detector circuit using a pulsed clock.
2. Water bottle dispenser
This machine accepts three coins and dispenses a water bottle and the balance on a successful
transaction.
Implemented in Xilinx Vivado, using Verilog HDL.
3. Handwritten Telugu Letters recognition using Neural Network (B.tech-
Major)
The project is implemented using MATLAB and is based on a deep learning technique called CNN and
image processing.
4. Layout of CMOS Logic Gates
Design of schematic, power &delay calculations, layout and DRC checks have been performed using
Cadence Virtuoso.
5. RTL Design of one’s counter in data using Brian Kernighan algorithm
Improved count of the number of one’s in the given data compared to the conventional shifting method
6. IOT-based voice-controlled Rover
This work is implemented on Node-MCU, processing on the thingspeak cloud, and app development in MIT
App inventor.

Courses
• NPTEL course on Digital IC Design by IIT Madras
• NPTEL course on Hardware Modelling using Verilog by IIT Kharagpur
• Static timing analysis course in Udemy
• Physical design course in Udemy

Positions of responsibility

• Teaching Assistantship in NIT Delhi:


1. IC applications Laboratory (Under Dr Preethi Verma)
2. Computer Networks Laboratory (Under Dr Nitin S Singha)
• Worked as a Technical Coordinator of Spoorthi2K20 (National Level Technical
Symposium of JNTUH)
Achievements/Participation

• Qualified Gate 2021.


• Qualified in JEE Mains & Advanced 2016
• Short-term course on the Latest trends in VLSI
• Solved more than Eighty problems using Verilog HDL in HDLBits
Extracurricular Activities

• As a Web Casting Officer for General Elections 2018 & 2019


• Special consolation prize in an Art competition at the school level
● Carrom, Cycling
Declaration

I hereby declare that the information given above is true and correct to the
best of my knowledge and belief.

Place: New Delhi Name

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