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Digital Logic Design Assignment Guide

The document is an assignment for a Digital Logic Design course at GCU, Lahore, focusing on various topics in Boolean algebra and logic design. It includes tasks such as comparing TTL and CMOS logic families, simplifying Boolean expressions, evaluating logical operations on binary strings, and constructing truth tables and logic diagrams. The assignment is structured into multiple questions, each requiring specific logical operations or simplifications.

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muhammadhaseeb1706
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35 views2 pages

Digital Logic Design Assignment Guide

The document is an assignment for a Digital Logic Design course at GCU, Lahore, focusing on various topics in Boolean algebra and logic design. It includes tasks such as comparing TTL and CMOS logic families, simplifying Boolean expressions, evaluating logical operations on binary strings, and constructing truth tables and logic diagrams. The assignment is structured into multiple questions, each requiring specific logical operations or simplifications.

Uploaded by

muhammadhaseeb1706
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

GCU, Lahore Roll no.

_____________________

Electrical Engineering Department Time:30 minutes

Digital Logic Design


Assignment 2-CLO2

1. Compare TTL and CMOS logic families in terms of speed, power consumption, noise
margin, and fan-out. [5]
2. Simplify the following Boolean expressions to a minimum number of literals: [5]
a) 𝐴𝐵𝐶 + 𝐴′ 𝐵 + 𝐴𝐵𝐶 ′
b) (𝑥 + 𝑦)′ (𝑥 ′ + 𝑦 ′ )′
c) 𝑥𝑦 + 𝑥(𝑤𝑧 + 𝑤𝑧 ′ )
d) (𝑎′ + 𝑐 ′ )(𝑎 + 𝑏 ′ + 𝑐 ′ )
3. Reduce the following Boolean expressions to the indicated number of literals: [5]
a) 𝐴′𝐶′ + 𝐴𝐵𝐶 + 𝐴𝐶 ′ to three literals
b) (𝑥 ′ 𝑦 ′ + 𝑧)′ + 𝑧 + 𝑥𝑦 + 𝑤𝑧 to three literals
c) 𝐴′ 𝐵(𝐷′ + 𝐶𝐷′ ) + 𝐵(𝐴 + 𝐴′ 𝐶𝐷) to one literal
d) 𝐴𝐵𝐶 ′ 𝐷 + 𝐴′ 𝐵𝐷 + 𝐴𝐵𝐶𝐷 to two literals

4. Given two eight‐bit strings A = 10110001 and B = 10101100, evaluate the eight‐bit result
after the following logical operations: [5]
(a)* AND (b) OR (c)* XOR (d)* NOT A (e) NOT B

5. Draw logic diagrams to implement the following Boolean expressions: [4]


a) 𝑦 = [(𝑢 + 𝑥 ′ )(𝑦 ′ + 𝑧)]
b) 𝑦 = (𝑢 ⊕ 𝑦)′ + 𝑥
6. Implement the Boolean function [8]

𝐹 = 𝑥𝑦 + 𝑥 ′ 𝑦 ′ + 𝑦′𝑧

a) With AND, OR and inverter gates.


b) With OR and inverter gates
c) With NAND and inverter gates
d) With NOR and inverter gates
7. Express the following function as a sum of minterms and as a product of maxterms: [5]
𝐹(𝐴, 𝐵, 𝐶, 𝐷) = 𝐵 ′ 𝐷 + 𝐴′ 𝐷 + 𝐵𝐷

8. Convert each of the following expressions into sum of products and product of sums: [5]
a) (𝑢 + 𝑥𝑤)(𝑥 + 𝑢 ′ 𝑣)
b) 𝑥 ′ + 𝑥(𝑥 + 𝑦 ′ )(𝑦 + 𝑧 ′ )
9. Show that the dual of the exclusive‐OR is equal to its complement. [3]
10. Write Boolean expressions and construct the truth tables describing the outputs of the
circuits described by the logic diagrams in Fig (a) and (b). [5]
GCU, Lahore Roll no. _____________________

Electrical Engineering Department Time:30 minutes

For the Boolean function [10]


𝐹 = 𝑥𝑦 ′ 𝑧 + 𝑥 ′ 𝑦 ′ 𝑧 + 𝑤 ′ 𝑥𝑦 + 𝑤𝑥 ′ 𝑦 + 𝑤𝑥𝑦
a) Obtain the truth table of F.
b) Draw the logic diagram, using the original Boolean expression.
c) Use Boolean algebra to simplify the function to a minimum number of literals.
d) Obtain the truth table of the function from the simplified expression and show that it is
the same as the one in part (a).
e) Draw the logic diagram from the simplified expression, and compare the total number
of gates with the diagram of part (b).

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