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Module2.3data Movement Instructions

This document summarizes data movement instructions in x86 assembly language. It discusses instruction formats, register-size prefixes, opcode byte formats including MOD, REG, and R/M fields. It also covers common data movement instructions like MOV, PUSH, POP, string instructions MOVS, LODS, STOS, and the use of assemblers like MASM.

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100% found this document useful (1 vote)
328 views42 pages

Module2.3data Movement Instructions

This document summarizes data movement instructions in x86 assembly language. It discusses instruction formats, register-size prefixes, opcode byte formats including MOD, REG, and R/M fields. It also covers common data movement instructions like MOV, PUSH, POP, string instructions MOVS, LODS, STOS, and the use of assemblers like MASM.

Uploaded by

api-3811113
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd

Data movement instructions

•Data movement instructions


– movement instructions: MOV, MOVSX, MOVZX,
PUSH, POP,BSWAP, XCHG, XLAT, IN, OUT, LEA
– string instructions: MOVS, LODS, STOS, INS,
and OUTS
– CMOV (conditional move) instruction on Pentium
Pro – P4
More commonly used in programs
•Assembler program: generate machine language
– many variants: syntax and directives
• Microsoft MACRO assembler (MASM)
• Intel Assembler (ASM)
• Borland Turbo assembler (TASM)
– generate native binary code
Instruction Formats

Mode selection is a function of OS


Override prefixes: first 2 bytes of 32-bit format
– address-size prefix (67H): modify size of operand address
– register-size prefix (66H): modify register size
Not always present
Register-size Prefixes
•Default size
– 16-bit instruction mode (either real or protected mode) uses
8- and 16-bit register and addressing modes by default
– 32-bit instruction mode (protected mode only) uses
8- and 32-bit register and addressing modes by default
•Toggle register size
– operate in 16-bit instruction mode and
• a 16-bit register is used ⇒ register-size prefix is absent
• a 32-bit register is used ⇒ register-size prefix (66H) is appended
– operate in 32-bit instruction mode and
• a 32-bit register is used ⇒ register-size prefix is absent
• a 16-bit register is used ⇒ register-size prefix (66H) is appended
Byte 1 : The Opcode
•Opcode: selects the operation performed by the μP
– 1 or 2 bytes long for most (not all) machine instructions
– addition, subtraction, move, and so on
•Direction (D) of data flow
– D=0: REG field → R/M field
– D=1: REG field ← R/M field
•Word (W) flag: whether the data are a byte or Word or Doubleword
–W=0: byte
–W=1:
• below 80386 (16-bit instruction mode): word
• In 80386 and above (32-bit instruction or protected mode) :
– word (if with register-size prefix, 66H)
– double word (if no register-size prefix)
Byte 2 : MOD + REG + R/M

MOD (mode), REG (register) and R/M (register/memory)


•MOD: specify the addressing mode of the selected instruction
11 – Register addressing mode – R/M specifies a reg.
00,01,10 – Data memory addressing mode – R/M specifies a memory
• Examples
00 – MOV AL,[DI]
01 - MOV al,[DI+2]
10 – MOV AL,[DI+1000H]
• When μP executes the instruction,
All 8-bit displacements are sign-extended into 16-bit
displacements (length=2 bytes) in mode 16.
eg. 00H-7FH (positive) → 0000H-007FH
eg. 80H-FFH (negative) → FF80H-FFFFH
To sign extend a number its sign bit is copied to the next higher
order bytes
All 8-bit displacements are sign-extended into 32-bit
displacements (length=4 bytes) in mode 32.

16 bit mode - If the MOD field is 10 and address size override prefix is
present then this cause 16 bit displacement to become a 32 bit
displacement.
32 bit mode - If the MOD field is 10 and address size override prefix is
present then this cause 32 bit displacement to become a 16 bit
displacement.
Register assignments
• When MOD=11 then the REG and R/M
represents the following registers
Example register addressing mode

Suppose 668BE8H – in 16 bit mode


66-register size override prefix- represents 32 bit registers
1000 1011 1110 1000 - > 100010 1 1 11 101 000
Then the instruction is MOV EBP, EAX

• .386 is placed before .MODEL – 32 bit mode is selected


• .386 is placed after .MODEL - 16 bit mode is slected
16-bit R/M Memory-Addressing
Modes
R/M represent memory addressing mode when MOD ≠ 11
– MOD=00, and R/M=101 => [DI]
– MOD=01 or 10, and R/M=101 => • [DI + displacement]
EG. MOV DL, [DI] (=8A15)

Special addressing mode


When memory data is referenced by only the displacement
The mode field is 00 and R/M field is 110 (uses addressing mode [BP]).
The assembler convert is as [BP+0]
MOV [1000H], DL (=88160010H)
MOV [BP], DL (=885600H)
32-bit Addressing Mode
• 32-bit instruction mode, or 16-bit instruction mode by
using address-size prefix 67H
• Example: 80386 and above operated in the 16-bit
instruction
MOV EAX, [EBX+4*ECX]
= 67 66 8B 04 8B H
67H: address size
66H: register size
8BH: opcode=100010, D=1, W=1
04H: MOD=00, REG=000, R/M=100
8BH: ss=10, index=001, Base=011
Immediate instruction
Segment MOV Instructions
PUSH/POP
• store and retrieve data from the LIFO stack
memory
• 6 forms of PUSH/POP: register, memory,
immediate, segment register, flags, and all
registers
– PUSH/POP immediate and PUSHA/POPA
(all registers) are available to 80286 –
Pentium 4
– PUSHAD/POPAD 32-bit register set are
available to 80386 – Pentium 4
PUSH
• Always transfer 2 bytes
of data(386 onwards 2
or 4 bytes).
• Source of data can be
any 16 or 32 bit register,
immediate data, any
segment register, and
memory data.
• When pushed –high
order 8 bits placed in sp-
1and low order 8 bits
placed in sp-2 location,
sp is then decremented
by 2.
Eg. PUSH AX
The push instructions
POP
• Inverse of PUSH
• Removes data from the stack
• When poped the low order bits are removed form sp and
high order from sp+1 then sp is incremented by 2
POP instructions
• POP CS is not a valid instruction
Initializing the stack
Load both SS and SP
• If stack is to reside in memory 10000H – 1FFFFH
– load SS with 1000H
– load SP with 0000H
Load-Effective Address
• LEA (Load-Effective Address): loads a 16- or 32-bit register with the
offset address of the data
– LEA BX, [DI] load the offset address specified by [DI] = MOV BX, DI
– MOV BX, [DI] load the data stored at [DI]
– LEA BX, LIST = MOV BX, OFFSET LIST
Offset instruction executes faster, but it cannot be used with LIST[SI]
and [DI]..
MOV BX,OFFSET LIST - assembler calculates the offset address of
LIST
LEA BX,LIST - Microprocessor calculates the address.
Example : Exchange the
content of two memory location
LDS,LES,LFS,LGS and LSS
• Load any 16 or 32 bit register with a offset address and the DS, ES,
FS, GS and SS segment register with a segment address.

• Can access a 32 bit or 48 bit section of memory that contain both


the segment and offset address.
32 bit - 16 bit offset and 16 bit segment address
48 bit – 32 bit offset and 16 bit segment address
• May not use register addressing mode (mod=11)
• Eg . LDS BX,[DI]

EBX 6F2A 30 11003


00 11002
EDI 1000 12 11001
1000 7A 11000
DS
1000 +
10000 11000
String Data Transfer
• Five string data transfer instructions
• LODS, STOS, MOVS,INS and OUTS
• The Direction flag – Used with string instructions
D=0 – auto increment & D=1 – auto decrement operation for the DI
and SI registers
CLD – instruction clear the d flag bit
STD – instruction set the d flag bit
For a byte – DI and SI inc/dec by 1
For a word – DI and SI inc/dec by 2
For a double word – DI and SI inc/dec by 4
• DI and SI registers
DI - offset address access data in extra segment
SI – offset address access data by default in data segment
The default segment can be changed by segment override prefix. DI
default cannot be changed
LODS
• Loads AL, AX or EAX with data stored at the data segment offset
addressed by SI
• After loading SI is incremented or decremented.
• LOADSB – load a byte
• LOADSW – load a word
• LOADSD – load a double word
• Can use operands defined using DB,DW,DD
LODSB AL=DS:[SI]; SI=SI+/-1
LODSW AX=DS:[SI]; SI=SI+/-2
LODSD EAX=DS:[SI]; SI=SI+/-4
LODS LIST AL=DS:[SI]; SI=SI+/-1 (LIST is a byte)
LODS DATA1 AX=DS:[SI]; SI=SI+/-2 (DATA1 is a word)
LODS FROG EAX=DS:[SI]; SI=SI+/-4(FROG is a double word)
LODSW – DS=1000H , D=0
STOS
• Stores AL,AX or EAX at the extra segment memory location
addressed by DI register.
• STOS with REP – the repeat prefix is added to any string data
transfer instruction except LODS
• It causes CX to decrement by 1 each time the instruction executes
• If CX reaches 0 the instruction terminates and continue with next
instruction
• This instruction stores the content of AX in a block of memory
• The arithmetic and logical operators that can be used with operands
are +, -, *, /, MOD, AND, OR & NOT

STOSB ES:[DI] = AL; DI = DI +/- 1


STOSW ES:[DI] = AX; DI = DI +/- 2
STOSD ES:[DI] = EAX; DI = DI +/- 4
STOS LIST ES:[DI] = AL; DI = DI +/- 1(LIST is a byte)
STOS DATA1 ES:[DI] = AX; DI = DI +/- 2(DATA1 is a word)
STOS FROG ES:[DI] = EAX; DI = DI +/- 4(FROG is a double word)
Example pgm – clear the video text display
MOVS
• Moves data from one memory location to another.
• This is the only mem- mem transfer instruction.
• Transfer byte, word or double word, from data segment addressed
by SI to Extra segment addressed by DI
• Forms of MOVS instruction
Example : Clear the video text
display
INS
• Input String – transfer a byte , word or double word of data from an
IO device into the extra segment addressed by DI.
• The IO address is contained in DX
• This instruction can be repeated using REP prefix
OUTS
• Output String – transfer a byte , word or double word of data from
the data segment addressed by SI to an IO device
• The device is addressed by DX register.
Other Data transfer Instructions
• XCHG – exchange – exchanges the content of a register
with content of other register or memory location
- Can not exchange segment reg. or mem to mem data.
- Can be byte word or double word
Eg.
XCHG AL, CL
XCHG CX, BP
XCHG EDX,ESI
XCHG AL, DATA2
-exchange between AX and any other register is the
most efficient instruction it takes just one byte
• LAHF and SAHF – allows 8085 s/w to be translated into 8086s/w by
a translation program
LAHF – transfer the right most 8 bits of flag register in to AH
SAHF – transfer the AH into right most 8 bits of flag register

• XLAT –Translate – converts the content of the AL into a number


stored in a memory table
- First adds the content of AL with BX to from a memory address with
in data segment .
-then copies the content of this address in to AL.
• IN and OUT
- IN– transfers the data from external IO device to AL, AX or EAX
- OUT – transfers the data from AL, AX or EAX to external IO device
- Two forms of IO device addressing – fixed port and variable port
- fixed port – 8 bit port address, and it follows the instructions opcode
- variable port - 16 bit port address, stored in DX register,it can be
changed during the execution.
Operation of XLAT
IN and OUT instructions
• MOVSX and MOV ZX
move and sign extend - sign bit is copied into the most significant
part
eg. MOVSX CX, BL
move and zero extend - zero is copied into the most significant part
eg. MOVZX DX, AL
- found in 386-pentium4 instruction set
• BSWAP –byte swap
- takes a 32 bit register and swap 1 & 4 bytes and 2 & 3 bytes
eg. BSWAP EAX (EAX= 00112233H)
EAX=33221100H
- used to convert from big endian form to little endian or vice
versa
- available only in 486 and all pentium processors
• CMOV – Conditional move - moves the data only if the condition is
true
• Destination is 16 or 32 bit register
• Source can be register or memory location
• New to pentium pro and pentium II instruction set
Segment override prefix
• Allows the programmer to deviate from
default segment
• For JMP and CALL it can not be prefixed

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