MICROPROCESSORS

AND
EMBEDDED SYSTEMS
BY
ANISHA RODRIGUES
Associate Professor
DEPT OF CSE

NMAMIT, NITTE
06/29/24 1
Architecture of 8086

06/29/24 2
 20
A dder

B us Interface
ES U nit
CS
SS
In stru ction
DS qu eu e

IP

AX AH(8) AL(8) Con trol Con trol

BH(8) BL(8) Unit lines
BX G en eral
CX CH(8) CL(8) Registers
DX DH(8) DL(8)

SP E xecution
BP
ALU U nit
DI
SI
Flag s

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 The BIU sends out addresses, fetches
instructions from memory, reads data from
memory and ports, and writes data to ports
and memory.

 The execution unit tells the BIU where to

fetch the instructions or data from, decodes
instructions and executes instructions.

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Execution Unit

 The execution unit consists of

 General Registers
 Arithmetic Logic Unit
 Control unit
 Flag Registers

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General Registers

 The CPU has eight 16-bit general registers

 They are divided into two files of four

registers each

 They are:
(a) The data register file and
(b) The pointer and index register file

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 AH AL AX
BH BL BX
CH CL CX
DH DL DX
Data Register File

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 The upper and lower halves of the data
registers are individually addressable

 The data registers can be used in most

arithmetic and logic operations

 Some instructions however require these

registers for specific use

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 The index register file consists of the Stack
Pointer (SP), the Base Pointer (BP), Source
Index (SI) and Destination Index (DI) registers
all are of 16-bits.

 The pointer and index register files are further

divided into the pointer sub-file (containing the
Stack Pointer and the Base Pointer registers)
and the index sub-file (containing the Source
index and Destination index registers).

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 The three registers BP,SI,DI can be used for
temporary storage of data just as general-
purpose registers.

 These registers are usually used to hold

offset addresses for addressing within a
segment.

 These can be used to hold the offset of a

data word in the data segment.

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 Unless otherwise specified in the instruction, stack
pointer registers refer to the current stack segment
while index register refers to the current data
segment.

 8086 has an additional pointer into the stack called

the BP register.

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 SI and DI are both 16-bits wide and are used by
string manipulation instructions and in building some
of the more powerful 8086/8088 data structures and
addressing modes.

 Both the SI and the DI registers have auto-

incrementing and auto-decrementing capabilities.

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Arithmetic Logic Unit (ALU)
 ALU is 16-bits wide. It can do the following 16-bits
arithmetic operations
 Addition
 Subtraction
 Multiplication
 Division

 Arithmetic operations may be performed on four

types of numbers
 Unsigned binary numbers
 Signed binary numbers (Integers)
 Unsigned packed decimal numbers
 Unsigned unpacked decimal numbers

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 The ALU can also perform logical operations
such as
 NOT
 AND
 OR
 EXCLUSIVE OR
 TEST

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Flag Register
 The Execution Unit has a 16-bit flag register which
indicates some conditions affected by the execution of
an instruction
 Some bits of the flag register control certain operations
of the EU

 Conditional Flags
 indicate some condition produced by an instruction

 Control Flags
 used to control certain operations of the processor.

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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

U U U U OF DF IF TF SF ZF U AF U PF U CF

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Conditional Flags:
 Six of the nine flags are used to indicate some
condition produced by an instruction and are set or
reset by the EU on the basis of results of some
arithmetic or logic operation

 These condition flags are also called status flags of

8086 microprocessor

 These are the Carry flag, Parity flag, Auxiliary carry

flag, Zero flag, Sign flag and Overflow flag

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Carry Flag (CF)

 This flag will be set to one if the addition of two

16-bit binary numbers produces a carry out of
the most significant bit position or if there is a
borrow to the MSB after subtraction

 This flag is also affected when other arithmetic

and logical instruction are executed

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Parity Flag (PF)

 This flag is set, if the result of the operation has

an even number of 1's

 This flag can be used to check for data

transmission error.

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Auxiliary Carry Flag (AF)

 This flag is set, when there is a carry out of the

lower nibble to the higher nibble or a borrow
from the higher nibble to the lower.

 The auxiliary carry flag is used for decimal

adjust operation.

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Zero Flag (Z)

 This flag is set when the result of an

operation is zero

 The flag is reset when the result is not zero

06/29/24 21
Overflow Flag (O)

 This flag is set, when an arithmetic overflow

occurs

 Overflow means that the size of the result

exceeded the storage capacity of the
destination, and a significant digit has been lost

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Sign flag (S)

 This flag is set, when an MSB bit of the result is

high after an arithmetic operation

 When this flag is set the data is assumed to be

negative and when this flag is zero it is assumed
to be positive

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Control Flags
 The three remaining flags in the flag register are used to
control certain operations of the processor.

 The application of these flags are different from that

of six conditional flags

 The control flags are deliberately set or reset with

specific instructions included in the program

 The other three Control flags are Trap Flag, Direction

Flag and Interrupt flag

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Trap flag (T)

 This is used for single stepping through a

program

 It is used for debugging the programs

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Interrupt Flag (I)

 It is used to allow / prohibit the interruption of a

program

 When the flag set, it enables the interrupt from

INTR

 When the flag is reset (0), it disables the

interrupt

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Direction Flag (D)

 It is used for string instruction

 If the direction flag is set, the pointers are

decremented else the pointers are
incremented

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Bus Interface Unit (BIU)
 The BIU sends out addresses, fetches instructions
from memory, reads data from memory and ports,
and writes data to ports and memory.

 BIU handles all transfers of data and addresses on

the buses for the execution unit.

 The BIU has

1. An instruction queue
2. An Instruction pointer
3. Segment registers

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Instruction Queue
 To speed up program execution, the BIU fetches as
many as 6 instruction bytes ahead of time from
memory.

 The prefetched instruction bytes are held for the EU

in a first-in-first-out group of register called a queue.

 When the EU is ready for its next instruction, it

simply reads the instruction from the queue in the
BIU.

06/29/24 30
 Fetching the next instruction while the
current instruction executes, is called
pipelining.

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Segment Registers
 The 8086 BIU sends out 20-bit addresses, so it
can address any 220 Or 1,048,576 bytes(1
Mbyte) in memory.

 However, at any given time the 8086 works with

only four 64KByte or 65,536 byte or 216 byte
segment within this 1 Mbyte range.

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 A segment is a logical unit of memory that may
be up to 64K bytes long

 Four segment registers in the BIU are used to

hold the upper 16 bits of the starting addresses
of four memory segments that the processor
working with at a particular time

 Each segment is made up of contiguous

memory locations and is an independent,
separately addressable unit

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 The four segment registers are the code
segment(CS) register, the stack segment(SS)
register, the extra segment(ES) register and
the data segment(DS) register.

 The segment register is used to hold the

upper 16 bits of the starting address for each
of the segments.

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 The BIU always inserts zeros for the lowest 4
bits (nibble) of the 20-bit starting address for a
segment

 If the code segment register contains 348Ah,

then the code segment will start at address
348A0h

06/29/24 35
 FFFFFH HIGHEST ADDRESS

7FFFFH Top of Extra Segment

64k

70000H Extra Segment Base ES = 7000H

5FFFFH Top of Stack Segment

64k

50000H Stack Segment Base SS = 5000h

4489FH Top of Code Segment

64k

348A0H Code Segment Base CS = 348Ah

2FFFFH Top of Data Segment

64k

20000H Bottom of Data Segment

06/29/24 36
 64KByte segment can be located anywhere
within 1MByte address space, but the
segment will start at an address with zeros in
the lowest 4 bits.

 The part of a segment starting address stored

in a segment register is often called the
segment base.

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Instruction Pointer (IP)
 The code segment register holds the upper 16
bits of the starting address of the segment from
which the BIU is currently fetching instruction .

 The Instruction pointer register holds the 16 bit

address or offset, of the next code byte within
the code segment

 The Instruction Pointer is a 16-bit register

06/29/24 38
  The value contained in the IP is referred to as an
offset because this value must be offset from
(added to) the segment base address in CS to
produce the required 20-bit physical address
sent out by the BIU

 The instruction pointer is incremented after

each opcode fetch to point to the next
instruction

 An alternative way of representing physical

address is the segment base: offsetform
 CS:IP

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06/29/24 40
Stack segment register and Stack
pointer register
 A stack is a section of memory set aside to store
address and data while subprogram is executing

 The upper 16 bits of the starting address for this

segment are kept in stack segment register.

 The stack pointer(SP) register in the execution

unit holds the 16 bit offset from the start of the
segment to the memory location where a word
was most recently stored on the stack

06/29/24 41
06/29/24 42
 Given that the EA is 2359 H and the DS =
490B H, what is the physical address?
DS: 490B0 H
EA: 2359 H
Physical add: 4B409

06/29/24 43
 Thank You..

ROSHAN FERNANDES, DEPARTMENT

06/29/24 OF CSE 44