WEL-COME TO X-86 FAMILY MICROPROCESSOR
INTRODUCTION TO INTEL X-86 FAMILY
INTRODUCTION –
The first microprocessor was a 4-bit microprocessor. In 1971 intel introduced the first 4-bit
microprocessor 4004.
In 1978 intel introduced 8088 & 8086 microprocessor. The IBM-PC and PC-XT were based
on 8088 & then Intel
Started advance versions such as 80186,80286,80386,80486 working as powerful
microprocessor.
The development of new CPU chips by Intel continued to new processor 80586 means
Pentium ,Pentium-II, Pentium-III and Pentium-IV. These microprocessor developed by Intel
called X-86 family microprocessor.
8-BIT MICROPROCESSOR
8085 Microprocessor Attributes-
1] It is an 8 bit microprocessor.
2] It is manufactured with N-MOS technology.
3] It has 16-bit address bus and hence can address up to 216 = 65536 bytes (64KB)
memory locations
through A0-A15
4] The first 8 lines of address bus and 8 lines of data bus are multiplexed AD0 – AD7
5] Data bus is a group of 8 lines D0 – D7
6] It supports external interrupt request. .
7]A 16 bit program counters (PC)
8] A 16 bit stack pointer (SP)
9] Six 8-bit general purpose register arranged in pairs: BC, DE, HL.
10] It requires a signal +5V power supply and operates at 3.2 MHZ single phase clock.
11] It is enclosed with 40 pins DIP (Dual in line package).
16-BIT MICROPROCESSOR
8086 / 8088 –
1] It is 16 bit microprocessor
2] It has 20 bit address bus
3] 40 pin DIP [dual pin package]
4] Capable of addressing 1MB of its address bus is 20 bit
5] Clock frequency of it is 5mhz to 10mhz
6] 8-bit external data bus
7] Operate in 2 modes minimum and maximum mode
8] 8088and 8086 has identical in internal architecture but only difference in
external design.
9] Power and clock similar to 8085
10] Support multiprocessor environment.
11] 16 data lines are multiplexed AD15 to AD0.
12] Data bus ,status signals multiplexed with address bus
80286 MICROPROCESSOR
1] It has 16 bit data bus and 24 bit address bus.
2]introduced in 1982.
3] 68 DIP pin package.
4] it 224 =16 MB physical memory.
5] it consisting of 2 modes . One is real mode it addresses only 1MB
memory and in other protected mode it addresses 16 MB.
6] its new property is that it work on 1GB virtual memory.
7] clock frequency is 6mhz to 20mhz.
8] it is design for multiuser operating system.
80386 MICROPROCESSOR
1] it is a 32-bit microprocessor. Thus has 32-bit ALU.
2]80386 has data bus of 32-bit.
3] It holds address bus of 32 bit.
4] It supports physical memory addressability of 4 GB and virtual
memory addressability of 64 TB.
5] 80386 supports variety of operating clock frequency, which are
16 MHz, 20 MHz, 25 MHz and 33 MHz.
6] It offers 3 stage pipeline: fetch, decode and execute. As it
supports simultaneous fetching, decoding and execution inside the
system.
80486 MICROPROCESSOR
1] it has 32-bit data bus.
2] it has 32-bit address bus means 232 means addresses 4GB physical memory.
2]it has a built in math coprocessor. This coprocessor is essentially the same as the
80387 processor used with a 80386, but being integrated on the chip allows it to
execute math instructions about three times as fast as a 80386/387 combination.
3] 80486 has 8Kbyte code and data cache.
4]To make room for the additional signals, the 80486 is packaged in a 168 pin, pin grid
array package instead of the 132 pin PGA used for the 80386.
5] Highly pipelined execution unit.
6] it used for high level language programming and support multiuser and
multitasking programming.
7] its clock frequency is 25mhz to 50mhz.
8] introduced in 1986.
80586 MICROPROCESSOR
Features of Pentium Processor are as follows:
1]64 bit data bus.
2] it has 32 bit address bus means 232 =4gb physical memory
3]8 bytes of data information can be transferred to and from memory in a single bus cycle
4]Supports burst read and burst write back cycles
5]Supports dual pipelining architecture process more than one instruction at per clock.
6]New advanced technology is used called branch prediction means Pentium makes educated guesses where
the next instruction is fetched.
Instruction cache
7]8 KB of dedicated instruction cache
8]Two Integer execution units, one Floating point execution unit
9]Dual instruction pipeline
256 lines between instruction cache and prefetch buffers; allows 32 bytes to be transferred from cache to
buffer
10]Data cache
8 KB dedicate data cache gives data to execution units
11]32 byte lines
Two parallel integer execution units
Allows the execution of two instructions to be executed simultaneously in a single
12]clock frequency is 60mhz to 233mhz. Introduced in 1993.
ADVANCED FEATURES OF PENTIUM PROCESSOR
ATTRIBUTES
A1 8088 8086 80286 80386S-X 80386D-X 80486S-X 80486D-X PENTIUM
[80586]
DATA BUS 8-bits 16-bits 16-bits 16-bits 32-bits 32-bits 32-bits 64-bits
ADDRESS BUS 2-bits 20-bits 24-bits 32-bits 32-bits 32-bits 32-bits 32-bits
OPERATING 5,8 5,8,10 6,8,10,20 16,20,25 33 16 to 50 25 to 33 25 to 50 50 to 100
SPEED [mhz]
INSTRUCTION ------ ------- --------- 16 bytes 16bytes 32 bytes 32 bytes 8kbytes
CACHE
DATA CACHE 256 bytes 256 bytes 8kbytes 8kbytes 8kbytes
MATH External External External External External External Internal Internal
COPROCESSOR
MEMORY External External Internal Internal Internal Internal Internal Internal
MANAGEMENT
PHYSICAL 1MB 1MB 16MB 4GB 4GB 4GB 4GB 4GB
MEMORY
ADDRESSED
WORD SIZE 16bits 16bits 16bits 32bits 32bits 32bits 32bits 32bits
INTRODUCTION 1978 10978 1982 19485 1985 1989 1991 1993
DATE
Slide 9
A1 Admin, 05-07-2020
ARCHITECTURE OF 8086 MICROPROCESSOR
The 8086 has two parts-
1]The Bus Interface Unit (BIU) and
2]The Execution Unit (EU).
The BIU fetches instructions, reads and writes data, and computes the 20-bit address.
The EU decodes and executes the instructions using the 16-bit ALU. The BIU contains the following
registers:
1] IP - the Instruction Pointer
2] CS - the Code Segment Register
3] DS - the Data Segment Register
4] SS - the Stack Segment Register
5] ES - the Extra Segment Register
The BIU fetches instructions using the CS and IP, written CS: IP, to construct the 20- bit address. Data is
fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU
depending on the addressing mode. The EU contains the following 16-bit registers:
1]AX - the Accumulator
2] BX - the Base Register
3]CX - the Count Register
4]DX - the Data Register
5]SP - the Stack Pointer
6]BP - the Base Pointer
7]SI - the Source Index Register
8]DI - the Destination Register
These are referred to as general-purpose registers, although, as seen by their names, they often have a
special-purpose use for some instructions. The AX, BX, CX, and DX registers can be considered as two 8-bit
registers, a High byte and a Low byte. This allows byte operations and compatibility with the previous
generation of 8-bit processors, the 8080 and 8085. The 8-bit registers are:
1] AX --> AH,AL
2] BX --> BH,BL
3] CX --> CH,CL
4] DX --> DH,DL
The ALU performs all basic computational operations: arithmetic, logical, and comparisons.
The control unit orchestrates the operation of the other units.
It fetches instructions from the on-chip cache, decodes them, and then executes them.
Each instruction has the control unit direct the other function units through a sequence of
steps that carry out the instruction's intent.
The execution path taken by the control unit can depend upon status bits produced by the
arithmetic logic unit or the floating-point unit (FPU) after the instruction sequence
completes.
This capability implements conditional
execution control flow, which is a critical element for general-purpose computation.
